summaryrefslogtreecommitdiffstats
path: root/drivers/spi/spi-bcm-qspi.h
diff options
context:
space:
mode:
authorKamal Dasu <kdasu.kdev@gmail.com>2016-08-25 00:04:25 +0200
committerMark Brown <broonie@kernel.org>2016-09-14 19:03:32 +0200
commit4e3b2d236fe00f0e0b6c45dcb3cc7d84c2316424 (patch)
tree8402ac49002fc0b100bcf0b5d6e3cf2a14820293 /drivers/spi/spi-bcm-qspi.h
parentspi: brcmstb-qspi: Broadcom settop platform driver (diff)
downloadlinux-4e3b2d236fe00f0e0b6c45dcb3cc7d84c2316424.tar.xz
linux-4e3b2d236fe00f0e0b6c45dcb3cc7d84c2316424.zip
spi: bcm-qspi: Add BSPI spi-nor flash controller driver
This change implements BSPI driver for Broadcom BRCMSTB, NS2, NSP SoCs works in combination with the MSPI controller driver and implements flash read acceleration and implements the spi_flash_read() method. Both MSPI and BSPI controllers are needed to access spi-nor flash. Signed-off-by: Kamal Dasu <kdasu.kdev@gmail.com> Signed-off-by: Yendapally Reddy Dhananjaya Reddy <yendapally.reddy@broadcom.com> Signed-off-by: Mark Brown <broonie@kernel.org>
Diffstat (limited to 'drivers/spi/spi-bcm-qspi.h')
-rw-r--r--drivers/spi/spi-bcm-qspi.h20
1 files changed, 20 insertions, 0 deletions
diff --git a/drivers/spi/spi-bcm-qspi.h b/drivers/spi/spi-bcm-qspi.h
index 8d4d385c444c..65c363b6b7b7 100644
--- a/drivers/spi/spi-bcm-qspi.h
+++ b/drivers/spi/spi-bcm-qspi.h
@@ -20,6 +20,26 @@
#include <linux/types.h>
#include <linux/io.h>
+/* BSPI interrupt masks */
+#define INTR_BSPI_LR_OVERREAD_MASK BIT(4)
+#define INTR_BSPI_LR_SESSION_DONE_MASK BIT(3)
+#define INTR_BSPI_LR_IMPATIENT_MASK BIT(2)
+#define INTR_BSPI_LR_SESSION_ABORTED_MASK BIT(1)
+#define INTR_BSPI_LR_FULLNESS_REACHED_MASK BIT(0)
+
+#define BSPI_LR_INTERRUPTS_DATA \
+ (INTR_BSPI_LR_SESSION_DONE_MASK | \
+ INTR_BSPI_LR_FULLNESS_REACHED_MASK)
+
+#define BSPI_LR_INTERRUPTS_ERROR \
+ (INTR_BSPI_LR_OVERREAD_MASK | \
+ INTR_BSPI_LR_IMPATIENT_MASK | \
+ INTR_BSPI_LR_SESSION_ABORTED_MASK)
+
+#define BSPI_LR_INTERRUPTS_ALL \
+ (BSPI_LR_INTERRUPTS_ERROR | \
+ BSPI_LR_INTERRUPTS_DATA)
+
/* MSPI Interrupt masks */
#define INTR_MSPI_HALTED_MASK BIT(6)
#define INTR_MSPI_DONE_MASK BIT(5)