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authorAndy Shevchenko <andriy.shevchenko@linux.intel.com>2015-03-09 15:48:48 +0100
committerMark Brown <broonie@kernel.org>2015-03-09 19:11:13 +0100
commit4d5ac1edfdd79aea31983333cb53dd5db29559f9 (patch)
treed36ff072616b0352df81b3878444d22e28c10092 /drivers/spi/spi-dw-mid.c
parentspi: dw-mid: take care of FIFO overrun/underrun when do DMA (diff)
downloadlinux-4d5ac1edfdd79aea31983333cb53dd5db29559f9.tar.xz
linux-4d5ac1edfdd79aea31983333cb53dd5db29559f9.zip
spi: dw-mid: clear ongoing DMA transfers on timeout
This patch shuts up any ongoing DMA transfer in case of error. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
Diffstat (limited to 'drivers/spi/spi-dw-mid.c')
-rw-r--r--drivers/spi/spi-dw-mid.c13
1 files changed, 13 insertions, 0 deletions
diff --git a/drivers/spi/spi-dw-mid.c b/drivers/spi/spi-dw-mid.c
index 3729cdd84e94..e614190daef6 100644
--- a/drivers/spi/spi-dw-mid.c
+++ b/drivers/spi/spi-dw-mid.c
@@ -270,11 +270,24 @@ static int mid_spi_dma_transfer(struct dw_spi *dws)
return 0;
}
+static void mid_spi_dma_stop(struct dw_spi *dws)
+{
+ if (test_bit(TX_BUSY, &dws->dma_chan_busy)) {
+ dmaengine_terminate_all(dws->txchan);
+ clear_bit(TX_BUSY, &dws->dma_chan_busy);
+ }
+ if (test_bit(RX_BUSY, &dws->dma_chan_busy)) {
+ dmaengine_terminate_all(dws->rxchan);
+ clear_bit(RX_BUSY, &dws->dma_chan_busy);
+ }
+}
+
static struct dw_spi_dma_ops mid_dma_ops = {
.dma_init = mid_spi_dma_init,
.dma_exit = mid_spi_dma_exit,
.dma_setup = mid_spi_dma_setup,
.dma_transfer = mid_spi_dma_transfer,
+ .dma_stop = mid_spi_dma_stop,
};
#endif