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| author | Shreyas Joshi <shreyas.joshi@biamp.com> | 2020-07-10 23:16:55 +0200 |
|---|---|---|
| committer | Mark Brown <broonie@kernel.org> | 2020-07-22 02:55:51 +0200 |
| commit | ce8e60fe4f517b3b2b1deb44cf364a9080521567 (patch) | |
| tree | e98b9f577a2842064a452c52062f85a15d89bcfb /drivers/spi/spi-gpio.c | |
| parent | spi: lpspi: fix the imbalance of runtime pm function call (diff) | |
| download | linux-ce8e60fe4f517b3b2b1deb44cf364a9080521567.tar.xz linux-ce8e60fe4f517b3b2b1deb44cf364a9080521567.zip | |
spi: spi-cadence: add support for chip select high
The spi cadence driver should support spi-cs-high in mode bits
so that the peripherals that needs the chip select to be high active can
use it. Add the SPI-CS-HIGH flag in the supported mode bits.
Signed-off-by: Shreyas Joshi <shreyas.joshi@biamp.com>
Link: https://lore.kernel.org/r/20200710211655.1564-1-shreyas.joshi@biamp.com
Signed-off-by: Mark Brown <broonie@kernel.org>
Diffstat (limited to 'drivers/spi/spi-gpio.c')
0 files changed, 0 insertions, 0 deletions