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| author | Leilk Liu <leilk.liu@mediatek.com> | 2015-08-20 11:19:07 +0200 |
|---|---|---|
| committer | Mark Brown <broonie@kernel.org> | 2015-08-20 20:09:48 +0200 |
| commit | af57937e862370c14b7d71d15d969593ffca1ba8 (patch) | |
| tree | 2ae765bfef1e3a0b1e62e66eb7a4b43377a68d3a /drivers/spi/spi-mt65xx.c | |
| parent | spi: mediatek: fix spi incorrect endian usage (diff) | |
| download | linux-af57937e862370c14b7d71d15d969593ffca1ba8.tar.xz linux-af57937e862370c14b7d71d15d969593ffca1ba8.zip | |
spi: medaitek: revise quirks compatibility style
The quirks are true/false, so define these as bool.
Signed-off-by: Leilk Liu <leilk.liu@mediatek.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
Diffstat (limited to 'drivers/spi/spi-mt65xx.c')
| -rw-r--r-- | drivers/spi/spi-mt65xx.c | 25 |
1 files changed, 7 insertions, 18 deletions
diff --git a/drivers/spi/spi-mt65xx.c b/drivers/spi/spi-mt65xx.c index 2eda2d1782f3..55d1c3e51864 100644 --- a/drivers/spi/spi-mt65xx.c +++ b/drivers/spi/spi-mt65xx.c @@ -71,10 +71,6 @@ #define SPI_CMD_FINISH_IE BIT(16) #define SPI_CMD_PAUSE_IE BIT(17) -#define MTK_SPI_QUIRK_PAD_SELECT 1 -/* Must explicitly send dummy Tx bytes to do Rx only transfer */ -#define MTK_SPI_QUIRK_MUST_TX 1 - #define MT8173_SPI_MAX_PAD_SEL 3 #define MTK_SPI_IDLE 0 @@ -84,8 +80,9 @@ #define MTK_SPI_PACKET_SIZE 1024 struct mtk_spi_compatible { - u32 need_pad_sel; - u32 must_tx; + bool need_pad_sel; + /* Must explicitly send dummy Tx bytes to do Rx only transfer */ + bool must_tx; }; struct mtk_spi { @@ -100,19 +97,11 @@ struct mtk_spi { const struct mtk_spi_compatible *dev_comp; }; -static const struct mtk_spi_compatible mt6589_compat = { - .need_pad_sel = 0, - .must_tx = 0, -}; - -static const struct mtk_spi_compatible mt8135_compat = { - .need_pad_sel = 0, - .must_tx = 0, -}; - +static const struct mtk_spi_compatible mt6589_compat; +static const struct mtk_spi_compatible mt8135_compat; static const struct mtk_spi_compatible mt8173_compat = { - .need_pad_sel = MTK_SPI_QUIRK_PAD_SELECT, - .must_tx = MTK_SPI_QUIRK_MUST_TX, + .need_pad_sel = true, + .must_tx = true, }; /* |