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authorJarkko Nikula <jarkko.nikula@linux.intel.com>2015-10-22 15:44:43 +0200
committerMark Brown <broonie@kernel.org>2015-10-23 01:56:05 +0200
commitceb941afa5c38dae8e273089266c412d362c7963 (patch)
treecaaca70e345c29508aefc308c91d8316cdb087ee /drivers/spi/spi-pxa2xx.c
parentspi: pxa2xx: Save other reg_cs_ctrl bits when configuring chip select (diff)
downloadlinux-ceb941afa5c38dae8e273089266c412d362c7963.tar.xz
linux-ceb941afa5c38dae8e273089266c412d362c7963.zip
spi: pxa2xx: Align a few defines
Add more indentation to define lines for making them aligned with the longest one. They would look messy after adding more long defines. Signed-off-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
Diffstat (limited to 'drivers/spi/spi-pxa2xx.c')
-rw-r--r--drivers/spi/spi-pxa2xx.c6
1 files changed, 3 insertions, 3 deletions
diff --git a/drivers/spi/spi-pxa2xx.c b/drivers/spi/spi-pxa2xx.c
index 4dc5660d4e33..0f6a6c89eab3 100644
--- a/drivers/spi/spi-pxa2xx.c
+++ b/drivers/spi/spi-pxa2xx.c
@@ -61,9 +61,9 @@ MODULE_ALIAS("platform:pxa2xx-spi");
| QUARK_X1000_SSCR1_TFT \
| SSCR1_SPH | SSCR1_SPO | SSCR1_LBM)
-#define GENERAL_REG_RXTO_HOLDOFF_DISABLE BIT(24)
-#define SPI_CS_CONTROL_SW_MODE BIT(0)
-#define SPI_CS_CONTROL_CS_HIGH BIT(1)
+#define GENERAL_REG_RXTO_HOLDOFF_DISABLE BIT(24)
+#define SPI_CS_CONTROL_SW_MODE BIT(0)
+#define SPI_CS_CONTROL_CS_HIGH BIT(1)
struct lpss_config {
/* LPSS offset from drv_data->ioaddr */