diff options
author | Linus Torvalds <torvalds@linux-foundation.org> | 2017-02-21 02:26:11 +0100 |
---|---|---|
committer | Linus Torvalds <torvalds@linux-foundation.org> | 2017-02-21 02:26:11 +0100 |
commit | 85adbcd54f0982040c8cc7a086f01554b8f64427 (patch) | |
tree | b5210dcee692b928bd133541dba31f487e246ac8 /drivers/spi/spi-pxa2xx.c | |
parent | Merge tag 'regulator-v4.11' of git://git.kernel.org/pub/scm/linux/kernel/git/... (diff) | |
parent | Merge remote-tracking branches 'spi/topic/ti-qspi' and 'spi/topic/topcliff-pc... (diff) | |
download | linux-85adbcd54f0982040c8cc7a086f01554b8f64427.tar.xz linux-85adbcd54f0982040c8cc7a086f01554b8f64427.zip |
Merge tag 'spi-v4.11' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi
Pull spi updates from Mark Brown:
"This release is mainly a collection of driver specific updates,
including a few nice cleanups to make drivers use more core features.
- automatically use the parent device to allocate DMA buffers if
there wasn't an explicitly configured device.
- fixes for leaks on allocation.
- a small piece of the start of SPI slave support, a feature that's
been on the cards for over a decade!"
* tag 'spi-v4.11' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi: (55 commits)
spi: spi-ti-qspi: Fix error handling
spi: spi-ti-qspi: Fix error handling
spi: lantiq-ssc: activate under COMPILE_TEST
spi: armada-3700: Remove spi_master_put in a3700_spi_remove()
spi: ti-qspi: revise ti_qspi_probe() failure flow
spi: spi-ep93xx: simplify GPIO chip selects
spi: rspi: Replaces "n" by "len" in qspi_transfer_*()
spi: rspi: Fixes bogus received byte in qspi_transfer_in()
spi: bcm-qspi: Remove unnecessary platform_set_drvdata()
spi: bcm-qspi: Fix bcm_qspi_bspi_read() performance
spi: lantiq-ssc: add support for Lantiq SSC SPI controller
spi: s3c64xx: fix inconsistency between binding and driver
spi: armada-3700: Remove .owner field for driver
spi: bcm-qspi: Added mspi read fallback in bcm_qspi_flash_read()
spi: fix device-node leaks
spi: mediatek: Only do dma for 4-byte aligned buffers
spi: When no dma_chan map buffers with spi_master's parent
spi: pca2xx-pci: Allow MSI
spi: pxa2xx: Prepare for edge-triggered interrupts
spi: pxa2xx: Add support for Intel Gemini Lake
...
Diffstat (limited to 'drivers/spi/spi-pxa2xx.c')
-rw-r--r-- | drivers/spi/spi-pxa2xx.c | 36 |
1 files changed, 22 insertions, 14 deletions
diff --git a/drivers/spi/spi-pxa2xx.c b/drivers/spi/spi-pxa2xx.c index d6239fa718be..47b65d7c4072 100644 --- a/drivers/spi/spi-pxa2xx.c +++ b/drivers/spi/spi-pxa2xx.c @@ -732,6 +732,20 @@ static irqreturn_t interrupt_transfer(struct driver_data *drv_data) return IRQ_HANDLED; } +static void handle_bad_msg(struct driver_data *drv_data) +{ + pxa2xx_spi_write(drv_data, SSCR0, + pxa2xx_spi_read(drv_data, SSCR0) & ~SSCR0_SSE); + pxa2xx_spi_write(drv_data, SSCR1, + pxa2xx_spi_read(drv_data, SSCR1) & ~drv_data->int_cr1); + if (!pxa25x_ssp_comp(drv_data)) + pxa2xx_spi_write(drv_data, SSTO, 0); + write_SSSR_CS(drv_data, drv_data->clear_sr); + + dev_err(&drv_data->pdev->dev, + "bad message state in interrupt handler\n"); +} + static irqreturn_t ssp_int(int irq, void *dev_id) { struct driver_data *drv_data = dev_id; @@ -771,21 +785,11 @@ static irqreturn_t ssp_int(int irq, void *dev_id) if (!(status & mask)) return IRQ_NONE; - if (!drv_data->master->cur_msg) { - - pxa2xx_spi_write(drv_data, SSCR0, - pxa2xx_spi_read(drv_data, SSCR0) - & ~SSCR0_SSE); - pxa2xx_spi_write(drv_data, SSCR1, - pxa2xx_spi_read(drv_data, SSCR1) - & ~drv_data->int_cr1); - if (!pxa25x_ssp_comp(drv_data)) - pxa2xx_spi_write(drv_data, SSTO, 0); - write_SSSR_CS(drv_data, drv_data->clear_sr); - - dev_err(&drv_data->pdev->dev, - "bad message state in interrupt handler\n"); + pxa2xx_spi_write(drv_data, SSCR1, sccr1_reg & ~drv_data->int_cr1); + pxa2xx_spi_write(drv_data, SSCR1, sccr1_reg); + if (!drv_data->master->cur_msg) { + handle_bad_msg(drv_data); /* Never fail */ return IRQ_HANDLED; } @@ -1458,6 +1462,10 @@ static const struct pci_device_id pxa2xx_spi_pci_compound_match[] = { { PCI_VDEVICE(INTEL, 0x1ac2), LPSS_BXT_SSP }, { PCI_VDEVICE(INTEL, 0x1ac4), LPSS_BXT_SSP }, { PCI_VDEVICE(INTEL, 0x1ac6), LPSS_BXT_SSP }, + /* GLK */ + { PCI_VDEVICE(INTEL, 0x31c2), LPSS_BXT_SSP }, + { PCI_VDEVICE(INTEL, 0x31c4), LPSS_BXT_SSP }, + { PCI_VDEVICE(INTEL, 0x31c6), LPSS_BXT_SSP }, /* APL */ { PCI_VDEVICE(INTEL, 0x5ac2), LPSS_BXT_SSP }, { PCI_VDEVICE(INTEL, 0x5ac4), LPSS_BXT_SSP }, |