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authorJon Lin <jon.lin@rock-chips.com>2021-06-21 12:47:57 +0200
committerMark Brown <broonie@kernel.org>2021-06-23 13:35:41 +0200
commit4a47fcdb5f8b220a396e896a4efed51c13e27d8b (patch)
tree1ff7c9f09dfa4ab09d9f4e165104328b44e327cb /drivers/spi/spi-rockchip.c
parentspi: rockchip: add compatible string for rv1126 (diff)
downloadlinux-4a47fcdb5f8b220a396e896a4efed51c13e27d8b.tar.xz
linux-4a47fcdb5f8b220a396e896a4efed51c13e27d8b.zip
spi: rockchip: Set rx_fifo interrupt waterline base on transfer item
The error here is to calculate the width as 8 bits. In fact, 16 bits should be considered. Signed-off-by: Jon Lin <jon.lin@rock-chips.com> Link: https://lore.kernel.org/r/20210621104800.19088-4-jon.lin@rock-chips.com Signed-off-by: Mark Brown <broonie@kernel.org>
Diffstat (limited to 'drivers/spi/spi-rockchip.c')
-rw-r--r--drivers/spi/spi-rockchip.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/drivers/spi/spi-rockchip.c b/drivers/spi/spi-rockchip.c
index bbeed3ae4ee1..0887b19ef3ad 100644
--- a/drivers/spi/spi-rockchip.c
+++ b/drivers/spi/spi-rockchip.c
@@ -540,8 +540,8 @@ static int rockchip_spi_config(struct rockchip_spi *rs,
* interrupt exactly when the fifo is full doesn't seem to work,
* so we need the strict inequality here
*/
- if (xfer->len < rs->fifo_len)
- writel_relaxed(xfer->len - 1, rs->regs + ROCKCHIP_SPI_RXFTLR);
+ if ((xfer->len / rs->n_bytes) < rs->fifo_len)
+ writel_relaxed(xfer->len / rs->n_bytes - 1, rs->regs + ROCKCHIP_SPI_RXFTLR);
else
writel_relaxed(rs->fifo_len / 2 - 1, rs->regs + ROCKCHIP_SPI_RXFTLR);