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| author | Miquel Raynal <miquel.raynal@bootlin.com> | 2019-11-08 15:07:42 +0100 |
|---|---|---|
| committer | Mark Brown <broonie@kernel.org> | 2019-11-08 18:44:30 +0100 |
| commit | dffaf7439979e6dbb820633bb4f44dcadcac847e (patch) | |
| tree | 3b6930b2fc120f60986d480f7e698775006bc0bf /drivers/spi/spi-sifive.c | |
| parent | spi: zynq-qspi: Enhance the Linear CFG bit definitions (diff) | |
| download | linux-dffaf7439979e6dbb820633bb4f44dcadcac847e.tar.xz linux-dffaf7439979e6dbb820633bb4f44dcadcac847e.zip | |
spi: zynq-qspi: Clarify the select chip function
The code used to assert and de-assert a chip select line is very
complicated for no reason. Simplify the logic by either setting or
resetting the concerned bit, which actually only changes an electrical
state.
Update the comment to reflect that there is no possibility to actually
choose a CS as the default (CS0) will be driven in any case.
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Link: https://lore.kernel.org/r/20191108140744.1734-6-miquel.raynal@bootlin.com
Signed-off-by: Mark Brown <broonie@kernel.org>
Diffstat (limited to 'drivers/spi/spi-sifive.c')
0 files changed, 0 insertions, 0 deletions