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authorRoel Kluin <roel.kluin@gmail.com>2010-10-02 14:03:32 +0200
committerGrant Likely <grant.likely@secretlab.ca>2010-10-03 05:09:08 +0200
commit23699f98f84f20195fddd0263d05a8ccb8694676 (patch)
treea6e1e9dd79d835caf8d2d39f4327ae559b2932df /drivers/spi/spi_gpio.c
parentspi/mpc8xxx: fix buffer overrun on large transfers (diff)
downloadlinux-23699f98f84f20195fddd0263d05a8ccb8694676.tar.xz
linux-23699f98f84f20195fddd0263d05a8ccb8694676.zip
spi: spi-gpio.c tests SPI_MASTER_NO_RX bit twice, but not SPI_MASTER_NO_TX
The SPI_MASTER_NO_TX bit (can't do buffer write) wasn't tested. This code was introduced in commit 3c8e1a84 (spi/spi-gpio: add support for controllers without MISO or MOSI pin). This patch fixes a bug in choosing which transfer ops to use. Signed-off-by: Roel Kluin <roel.kluin@gmail.com> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
Diffstat (limited to 'drivers/spi/spi_gpio.c')
-rw-r--r--drivers/spi/spi_gpio.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/spi/spi_gpio.c b/drivers/spi/spi_gpio.c
index e24a63498acb..63e51b011d50 100644
--- a/drivers/spi/spi_gpio.c
+++ b/drivers/spi/spi_gpio.c
@@ -350,7 +350,7 @@ static int __init spi_gpio_probe(struct platform_device *pdev)
spi_gpio->bitbang.master = spi_master_get(master);
spi_gpio->bitbang.chipselect = spi_gpio_chipselect;
- if ((master_flags & (SPI_MASTER_NO_RX | SPI_MASTER_NO_RX)) == 0) {
+ if ((master_flags & (SPI_MASTER_NO_TX | SPI_MASTER_NO_RX)) == 0) {
spi_gpio->bitbang.txrx_word[SPI_MODE_0] = spi_gpio_txrx_word_mode0;
spi_gpio->bitbang.txrx_word[SPI_MODE_1] = spi_gpio_txrx_word_mode1;
spi_gpio->bitbang.txrx_word[SPI_MODE_2] = spi_gpio_txrx_word_mode2;