diff options
| author | David Woodhouse <dwmw2@infradead.org> | 2007-07-23 11:20:10 +0200 |
|---|---|---|
| committer | David Woodhouse <dwmw2@infradead.org> | 2007-07-23 11:20:10 +0200 |
| commit | 39fe5434cb9de5da40510028b17b96bc4eb312b3 (patch) | |
| tree | 7a02a317b9ad57da51ca99887c119e779ccf3f13 /drivers/spi/spi_imx.c | |
| parent | [JFFS2] Add declaration of jffs2_lzo_{init,exit} to compr.h (diff) | |
| parent | Linux 2.6.23-rc1 (diff) | |
| download | linux-39fe5434cb9de5da40510028b17b96bc4eb312b3.tar.xz linux-39fe5434cb9de5da40510028b17b96bc4eb312b3.zip | |
Merge branch 'master' of git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux-2.6
Diffstat (limited to 'drivers/spi/spi_imx.c')
| -rw-r--r-- | drivers/spi/spi_imx.c | 24 |
1 files changed, 9 insertions, 15 deletions
diff --git a/drivers/spi/spi_imx.c b/drivers/spi/spi_imx.c index 656be4a5094a..aee9ad6f633c 100644 --- a/drivers/spi/spi_imx.c +++ b/drivers/spi/spi_imx.c @@ -1163,6 +1163,9 @@ msg_rejected: return -EINVAL; } +/* the spi->mode bits understood by this driver: */ +#define MODEBITS (SPI_CPOL | SPI_CPHA | SPI_CS_HIGH) + /* On first setup bad values must free chip_data memory since will cause spi_new_device to fail. Bad value setup from protocol driver are simply not applied and notified to the calling driver. */ @@ -1174,6 +1177,12 @@ static int setup(struct spi_device *spi) u32 tmp; int status = 0; + if (spi->mode & ~MODEBITS) { + dev_dbg(&spi->dev, "setup: unsupported mode bits %x\n", + spi->mode & ~MODEBITS); + return -EINVAL; + } + /* Get controller data */ chip_info = spi->controller_data; @@ -1245,21 +1254,6 @@ static int setup(struct spi_device *spi) /* SPI mode */ tmp = spi->mode; - if (tmp & SPI_LSB_FIRST) { - status = -EINVAL; - if (first_setup) { - dev_err(&spi->dev, - "setup - " - "HW doesn't support LSB first transfer\n"); - goto err_first_setup; - } else { - dev_err(&spi->dev, - "setup - " - "HW doesn't support LSB first transfer, " - "default to MSB first\n"); - spi->mode &= ~SPI_LSB_FIRST; - } - } if (tmp & SPI_CS_HIGH) { u32_EDIT(chip->control, SPI_CONTROL_SSPOL, SPI_CONTROL_SSPOL_ACT_HIGH); |