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authorMarek Szyprowski <m.szyprowski@samsung.com>2010-06-30 22:27:32 +0200
committerGrant Likely <grant.likely@secretlab.ca>2010-07-04 06:45:44 +0200
commit04bb2a031cf95b34b7432dd47b318a932a895b4c (patch)
treed5c831a56c01b4a357450abae47f1afe8d61de34 /drivers/spi/spi_s3c24xx_gpio.c
parentSPI100k: Fix 8-bit and RX-only transfers (diff)
downloadlinux-04bb2a031cf95b34b7432dd47b318a932a895b4c.tar.xz
linux-04bb2a031cf95b34b7432dd47b318a932a895b4c.zip
spi/bitbang: add support for SPI_MASTER_NO_{TX, RX} modes
This patch adds a new flags argument to bitbang_txrx_be_cpha0 and bitbang_txrx_be_cpha1 transfer functions. This enables support for SPI_MASTER_NO_{TX,RX} transfer modes. The change should have no impact on speed of the existing drivers. bitbank_txrx_* functions are usually inlined into the drivers. When the argument is equal to constant zero, the optimizer would be able to eliminate the dead code (flags checks) easily. Tested on ARM and GCC 4.4.x and in all cases the checks were eliminated in the inlined function. Reviewed-by: Kyungmin Park <kyungmin.park@samsung.com> Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com> Acked-by: David Brownell <dbrownell@users.sourceforge.net> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
Diffstat (limited to 'drivers/spi/spi_s3c24xx_gpio.c')
-rw-r--r--drivers/spi/spi_s3c24xx_gpio.c8
1 files changed, 4 insertions, 4 deletions
diff --git a/drivers/spi/spi_s3c24xx_gpio.c b/drivers/spi/spi_s3c24xx_gpio.c
index 8979a75dbd7b..be991359bf92 100644
--- a/drivers/spi/spi_s3c24xx_gpio.c
+++ b/drivers/spi/spi_s3c24xx_gpio.c
@@ -64,25 +64,25 @@ static inline u32 getmiso(struct spi_device *dev)
static u32 s3c2410_spigpio_txrx_mode0(struct spi_device *spi,
unsigned nsecs, u32 word, u8 bits)
{
- return bitbang_txrx_be_cpha0(spi, nsecs, 0, word, bits);
+ return bitbang_txrx_be_cpha0(spi, nsecs, 0, 0, word, bits);
}
static u32 s3c2410_spigpio_txrx_mode1(struct spi_device *spi,
unsigned nsecs, u32 word, u8 bits)
{
- return bitbang_txrx_be_cpha1(spi, nsecs, 0, word, bits);
+ return bitbang_txrx_be_cpha1(spi, nsecs, 0, 0, word, bits);
}
static u32 s3c2410_spigpio_txrx_mode2(struct spi_device *spi,
unsigned nsecs, u32 word, u8 bits)
{
- return bitbang_txrx_be_cpha0(spi, nsecs, 1, word, bits);
+ return bitbang_txrx_be_cpha0(spi, nsecs, 1, 0, word, bits);
}
static u32 s3c2410_spigpio_txrx_mode3(struct spi_device *spi,
unsigned nsecs, u32 word, u8 bits)
{
- return bitbang_txrx_be_cpha1(spi, nsecs, 1, word, bits);
+ return bitbang_txrx_be_cpha1(spi, nsecs, 1, 0, word, bits);
}