diff options
| author | Shimoda, Yoshihiro <yoshihiro.shimoda.uh@renesas.com> | 2012-03-07 06:45:37 +0100 |
|---|---|---|
| committer | Grant Likely <grant.likely@secretlab.ca> | 2012-03-08 03:18:45 +0100 |
| commit | 0eb8880fac7b0f32ebab33f99e758c6b308e3aa1 (patch) | |
| tree | 2d8ca659f3db6d17a1957fd6c9957beace6c171e /drivers/spi | |
| parent | spi/omap: Add DT support to McSPI driver (diff) | |
| download | linux-0eb8880fac7b0f32ebab33f99e758c6b308e3aa1.tar.xz linux-0eb8880fac7b0f32ebab33f99e758c6b308e3aa1.zip | |
spi/spi-sh: add IORESOURCE_MEM_TYPE_MASK decoding for access size
This SPI controller's access size is 32, or 8-bit. The previous driver
supported 32-bit only. So, this patch adds IORESOURCE_MEM_TYPE_MASK
decoding, an then, the driver can handle the SPI controller of 8-bit.
Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
Diffstat (limited to 'drivers/spi')
| -rw-r--r-- | drivers/spi/spi-sh.c | 25 |
1 files changed, 23 insertions, 2 deletions
diff --git a/drivers/spi/spi-sh.c b/drivers/spi/spi-sh.c index 70c8af9f7ccc..79442c31bcd9 100644 --- a/drivers/spi/spi-sh.c +++ b/drivers/spi/spi-sh.c @@ -92,17 +92,26 @@ struct spi_sh_data { unsigned long cr1; wait_queue_head_t wait; spinlock_t lock; + int width; }; static void spi_sh_write(struct spi_sh_data *ss, unsigned long data, unsigned long offset) { - writel(data, ss->addr + offset); + if (ss->width == 8) + iowrite8(data, ss->addr + (offset >> 2)); + else if (ss->width == 32) + iowrite32(data, ss->addr + offset); } static unsigned long spi_sh_read(struct spi_sh_data *ss, unsigned long offset) { - return readl(ss->addr + offset); + if (ss->width == 8) + return ioread8(ss->addr + (offset >> 2)); + else if (ss->width == 32) + return ioread32(ss->addr + offset); + else + return 0; } static void spi_sh_set_bit(struct spi_sh_data *ss, unsigned long val, @@ -464,6 +473,18 @@ static int __devinit spi_sh_probe(struct platform_device *pdev) ss = spi_master_get_devdata(master); dev_set_drvdata(&pdev->dev, ss); + switch (res->flags & IORESOURCE_MEM_TYPE_MASK) { + case IORESOURCE_MEM_8BIT: + ss->width = 8; + break; + case IORESOURCE_MEM_32BIT: + ss->width = 32; + break; + default: + dev_err(&pdev->dev, "No support width\n"); + ret = -ENODEV; + goto error1; + } ss->irq = irq; ss->master = master; ss->addr = ioremap(res->start, resource_size(res)); |