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author | Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com> | 2023-05-18 04:41:17 +0200 |
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committer | Vinod Koul <vkoul@kernel.org> | 2023-05-29 07:19:47 +0200 |
commit | 46b56a5cd2ff496c0707ae3deae849f12b86e534 (patch) | |
tree | 5bcaa546306a4bfe050aee99742fd550f603bec2 /drivers/spi | |
parent | soundwire: intel_bus_common: update error log (diff) | |
download | linux-46b56a5cd2ff496c0707ae3deae849f12b86e534.tar.xz linux-46b56a5cd2ff496c0707ae3deae849f12b86e534.zip |
soundwire: intel_bus_common: enable interrupts last
It's not clear why we enabled interrupts in the Cadence IP first. The
logical programming sequence should be to first start the bus, and
only second to enable the interrupts.
Signed-off-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com>
Reviewed-by: Rander Wang <rander.wang@intel.com>
Signed-off-by: Bard Liao <yung-chuan.liao@linux.intel.com>
Link: https://lore.kernel.org/r/20230518024119.164160-2-yung-chuan.liao@linux.intel.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Diffstat (limited to 'drivers/spi')
0 files changed, 0 insertions, 0 deletions