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authorGabor Juhos <juhosg@openwrt.org>2012-12-27 10:42:25 +0100
committerGrant Likely <grant.likely@secretlab.ca>2013-02-05 13:57:45 +0100
commit72611db0eef21f4456d79ba302af4b34ea384f30 (patch)
treeb391e700ca1b409bf3b55384d0d105a931c7c730 /drivers/spi
parentspi/ath79: add delay between SCK changes (diff)
downloadlinux-72611db0eef21f4456d79ba302af4b34ea384f30.tar.xz
linux-72611db0eef21f4456d79ba302af4b34ea384f30.zip
spi/ath79: add missing HIGH->LOW SCK transition
The 'ath79_spi_txrx_mode0' function does not set the SCK signal to LOW at the end of a word transfer. This causes communications errors with certain devices (e.g. the PCF2123 RTC chip). The patch ensures that the SCK signal will be LOW. Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
Diffstat (limited to 'drivers/spi')
-rw-r--r--drivers/spi/spi-ath79.c2
1 files changed, 2 insertions, 0 deletions
diff --git a/drivers/spi/spi-ath79.c b/drivers/spi/spi-ath79.c
index e02528244451..d4b8e1236612 100644
--- a/drivers/spi/spi-ath79.c
+++ b/drivers/spi/spi-ath79.c
@@ -200,6 +200,8 @@ static u32 ath79_spi_txrx_mode0(struct spi_device *spi, unsigned nsecs,
ath79_spi_delay(sp, nsecs);
ath79_spi_wr(sp, AR71XX_SPI_REG_IOC, out | AR71XX_SPI_IOC_CLK);
ath79_spi_delay(sp, nsecs);
+ if (bits == 1)
+ ath79_spi_wr(sp, AR71XX_SPI_REG_IOC, out);
word <<= 1;
}