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| author | Alexander Sverdlin <alexander.sverdlin@siemens.com> | 2022-11-30 17:29:27 +0100 |
|---|---|---|
| committer | Mark Brown <broonie@kernel.org> | 2022-12-01 12:16:56 +0100 |
| commit | 7dbfa445ff7393d1c4c066c1727c9e0af1251958 (patch) | |
| tree | 97215dbe0c61c7f701c217002f2f7be9ba454209 /drivers/spi | |
| parent | spi: cadence-quadspi: Add minimum operable clock rate warning to baudrate div... (diff) | |
| download | linux-7dbfa445ff7393d1c4c066c1727c9e0af1251958.tar.xz linux-7dbfa445ff7393d1c4c066c1727c9e0af1251958.zip | |
spi: spidev: mask SPI_CS_HIGH in SPI_IOC_RD_MODE
Commit f3186dd87669 ("spi: Optionally use GPIO descriptors for CS GPIOs")
has changed the user-space interface so that bogus SPI_CS_HIGH started
to appear in the mask returned by SPI_IOC_RD_MODE even for active-low CS
pins. Commit 138c9c32f090
("spi: spidev: Fix CS polarity if GPIO descriptors are used") fixed only
SPI_IOC_WR_MODE part of the problem. Let's fix SPI_IOC_RD_MODE
symmetrically.
Test case:
#include <sys/ioctl.h>
#include <fcntl.h>
#include <linux/spi/spidev.h>
int main(int argc, char **argv)
{
char modew = SPI_CPHA;
char moder;
int f = open("/dev/spidev0.0", O_RDWR);
if (f < 0)
return 1;
ioctl(f, SPI_IOC_WR_MODE, &modew);
ioctl(f, SPI_IOC_RD_MODE, &moder);
return moder == modew ? 0 : 2;
}
Fixes: f3186dd87669 ("spi: Optionally use GPIO descriptors for CS GPIOs")
Signed-off-by: Alexander Sverdlin <alexander.sverdlin@siemens.com>
Link: https://lore.kernel.org/r/20221130162927.539512-1-alexander.sverdlin@siemens.com
Signed-off-by: Mark Brown <broonie@kernel.org>
Diffstat (limited to 'drivers/spi')
| -rw-r--r-- | drivers/spi/spidev.c | 21 |
1 files changed, 16 insertions, 5 deletions
diff --git a/drivers/spi/spidev.c b/drivers/spi/spidev.c index b2775d82d2d7..6313e7d0cdf8 100644 --- a/drivers/spi/spidev.c +++ b/drivers/spi/spidev.c @@ -377,12 +377,23 @@ spidev_ioctl(struct file *filp, unsigned int cmd, unsigned long arg) switch (cmd) { /* read requests */ case SPI_IOC_RD_MODE: - retval = put_user(spi->mode & SPI_MODE_MASK, - (__u8 __user *)arg); - break; case SPI_IOC_RD_MODE32: - retval = put_user(spi->mode & SPI_MODE_MASK, - (__u32 __user *)arg); + tmp = spi->mode; + + { + struct spi_controller *ctlr = spi->controller; + + if (ctlr->use_gpio_descriptors && ctlr->cs_gpiods && + ctlr->cs_gpiods[spi->chip_select]) + tmp &= ~SPI_CS_HIGH; + } + + if (cmd == SPI_IOC_RD_MODE) + retval = put_user(tmp & SPI_MODE_MASK, + (__u8 __user *)arg); + else + retval = put_user(tmp & SPI_MODE_MASK, + (__u32 __user *)arg); break; case SPI_IOC_RD_LSB_FIRST: retval = put_user((spi->mode & SPI_LSB_FIRST) ? 1 : 0, |