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| author | Arnd Bergmann <arnd@arndb.de> | 2021-10-13 16:45:55 +0200 |
|---|---|---|
| committer | Mark Brown <broonie@kernel.org> | 2021-10-13 17:46:46 +0200 |
| commit | d9c55c95a3eac8536fbc6ef39dee69d3716aeee2 (patch) | |
| tree | ec088536eec729c2c6d54fc1b3783852d6b07a16 /drivers/spi | |
| parent | spi: tegra20: fix build with CONFIG_PM_SLEEP=n (diff) | |
| download | linux-d9c55c95a3eac8536fbc6ef39dee69d3716aeee2.tar.xz linux-d9c55c95a3eac8536fbc6ef39dee69d3716aeee2.zip | |
spi: cadence-quadspi: fix dma_unmap_single() call
There are separate constants for the dma-mapping API and the dmaengine
API, mixing them up causes a warning in some builds:
In file included from drivers/spi/spi-cadence-quadspi.c:12:
drivers/spi/spi-cadence-quadspi.c: In function 'cqspi_versal_indirect_read_dma':
drivers/spi/spi-cadence-quadspi.c:950:55: error: implicit conversion from 'enum dma_transfer_direction' to 'enum dma_data_direction' [-Werror=enum-conversion]
950 | dma_unmap_single(dev, dma_addr, bytes_to_dma, DMA_DEV_TO_MEM);
| ^~~~~~~~~~~~~~
include/linux/dma-mapping.h:407:70: note: in definition of macro 'dma_unmap_single'
407 | #define dma_unmap_single(d, a, s, r) dma_unmap_single_attrs(d, a, s, r, 0)
| ^
Fixes: 1a6f854f7daa ("spi: cadence-quadspi: Add Xilinx Versal external DMA support")
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Link: https://lore.kernel.org/r/20211013144600.2378037-1-arnd@kernel.org
Signed-off-by: Mark Brown <broonie@kernel.org>
Diffstat (limited to 'drivers/spi')
| -rw-r--r-- | drivers/spi/spi-cadence-quadspi.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/spi/spi-cadence-quadspi.c b/drivers/spi/spi-cadence-quadspi.c index 5bdb1bae5c99..8b3d268ac63c 100644 --- a/drivers/spi/spi-cadence-quadspi.c +++ b/drivers/spi/spi-cadence-quadspi.c @@ -947,7 +947,7 @@ failrd: writel(CQSPI_REG_INDIRECTWR_CANCEL_MASK, reg_base + CQSPI_REG_INDIRECTRD); - dma_unmap_single(dev, dma_addr, bytes_to_dma, DMA_DEV_TO_MEM); + dma_unmap_single(dev, dma_addr, bytes_to_dma, DMA_FROM_DEVICE); reg = readl(cqspi->iobase + CQSPI_REG_CONFIG); reg &= ~CQSPI_REG_CONFIG_DMA_MASK; |