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authorAmelie Delaunay <amelie.delaunay@st.com>2020-08-10 09:12:36 +0200
committerMark Brown <broonie@kernel.org>2020-08-10 20:46:43 +0200
commit9cc61973bf9385b19ff5dda4a2a7e265fcba85e4 (patch)
treefa182a40d677509123a611bf0c2ece2aefb4d313 /drivers/spi
parentspi: stm32: fix fifo threshold level in case of short transfer (diff)
downloadlinux-9cc61973bf9385b19ff5dda4a2a7e265fcba85e4.tar.xz
linux-9cc61973bf9385b19ff5dda4a2a7e265fcba85e4.zip
spi: stm32: fix stm32_spi_prepare_mbr in case of odd clk_rate
Fix spi->clk_rate when it is odd to the nearest lowest even value because minimum SPI divider is 2. Signed-off-by: Amelie Delaunay <amelie.delaunay@st.com> Signed-off-by: Alain Volmat <alain.volmat@st.com> Link: https://lore.kernel.org/r/1597043558-29668-4-git-send-email-alain.volmat@st.com Signed-off-by: Mark Brown <broonie@kernel.org>
Diffstat (limited to 'drivers/spi')
-rw-r--r--drivers/spi/spi-stm32.c3
1 files changed, 2 insertions, 1 deletions
diff --git a/drivers/spi/spi-stm32.c b/drivers/spi/spi-stm32.c
index e5450233f3f8..571dea72bf7e 100644
--- a/drivers/spi/spi-stm32.c
+++ b/drivers/spi/spi-stm32.c
@@ -441,7 +441,8 @@ static int stm32_spi_prepare_mbr(struct stm32_spi *spi, u32 speed_hz,
{
u32 div, mbrdiv;
- div = DIV_ROUND_UP(spi->clk_rate, speed_hz);
+ /* Ensure spi->clk_rate is even */
+ div = DIV_ROUND_UP(spi->clk_rate & ~0x1, speed_hz);
/*
* SPI framework set xfer->speed_hz to master->max_speed_hz if