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| author | Hauke Mehrtens <hauke@hauke-m.de> | 2011-06-21 20:57:16 +0200 |
|---|---|---|
| committer | John W. Linville <linville@tuxdriver.com> | 2011-06-22 22:09:58 +0200 |
| commit | cd15598707aff52da4302d9b6a3fc878bca27383 (patch) | |
| tree | ecf5e01003366373cc4873e56d6ef72fd2592ba3 /drivers/ssb/driver_gige.c | |
| parent | ath9k: enable support for AR9330 (diff) | |
| download | linux-cd15598707aff52da4302d9b6a3fc878bca27383.tar.xz linux-cd15598707aff52da4302d9b6a3fc878bca27383.zip | |
ssb: add __devinit to some functions
Two functions in ssb are using register_pci_controller() which is
__devinit. The functions ssb_pcicore_init_hostmode() and
ssb_gige_probe() should also be __devinit.
This fixes the following warning:
WARNING: vmlinux.o(.text+0x2727b8): Section mismatch in reference from the function ssb_pcicore_init_hostmode() to the function .devinit.text:register_pci_controller()
The function ssb_pcicore_init_hostmode() references
the function __devinit register_pci_controller().
This is often because ssb_pcicore_init_hostmode lacks a __devinit
annotation or the annotation of register_pci_controller is wrong.
WARNING: vmlinux.o(.text+0x273398): Section mismatch in reference from the function ssb_gige_probe() to the function .devinit.text:register_pci_controller()
The function ssb_gige_probe() references
the function __devinit register_pci_controller().
This is often because ssb_gige_probe lacks a __devinit
annotation or the annotation of register_pci_controller is wrong.
Reported-by: Ralf Baechle <ralf@linux-mips.org>
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
Diffstat (limited to 'drivers/ssb/driver_gige.c')
| -rw-r--r-- | drivers/ssb/driver_gige.c | 13 |
1 files changed, 8 insertions, 5 deletions
diff --git a/drivers/ssb/driver_gige.c b/drivers/ssb/driver_gige.c index 5ba92a2719a4..d75890909222 100644 --- a/drivers/ssb/driver_gige.c +++ b/drivers/ssb/driver_gige.c @@ -106,8 +106,9 @@ void gige_pcicfg_write32(struct ssb_gige *dev, gige_write32(dev, SSB_GIGE_PCICFG + offset, value); } -static int ssb_gige_pci_read_config(struct pci_bus *bus, unsigned int devfn, - int reg, int size, u32 *val) +static int __devinit ssb_gige_pci_read_config(struct pci_bus *bus, + unsigned int devfn, int reg, + int size, u32 *val) { struct ssb_gige *dev = container_of(bus->ops, struct ssb_gige, pci_ops); unsigned long flags; @@ -136,8 +137,9 @@ static int ssb_gige_pci_read_config(struct pci_bus *bus, unsigned int devfn, return PCIBIOS_SUCCESSFUL; } -static int ssb_gige_pci_write_config(struct pci_bus *bus, unsigned int devfn, - int reg, int size, u32 val) +static int __devinit ssb_gige_pci_write_config(struct pci_bus *bus, + unsigned int devfn, int reg, + int size, u32 val) { struct ssb_gige *dev = container_of(bus->ops, struct ssb_gige, pci_ops); unsigned long flags; @@ -166,7 +168,8 @@ static int ssb_gige_pci_write_config(struct pci_bus *bus, unsigned int devfn, return PCIBIOS_SUCCESSFUL; } -static int ssb_gige_probe(struct ssb_device *sdev, const struct ssb_device_id *id) +static int __devinit ssb_gige_probe(struct ssb_device *sdev, + const struct ssb_device_id *id) { struct ssb_gige *dev; u32 base, tmslow, tmshigh; |