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authorChristian König <christian.koenig@amd.com>2013-04-18 15:25:58 +0200
committerAlex Deucher <alexander.deucher@amd.com>2013-04-22 16:39:16 +0200
commit4ed108352d9b60a723a5071ed05e722826c2b72f (patch)
treed2f1500ca5a72b79d073770f28916d68d37a91fa /drivers/target
parentdrm/radeon: disable audio format interrupts on Evergreen (diff)
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drm/radeon: put UVD PLLs in bypass mode
Just power down the PLL when we get a VCLK or DCLK of zero. Enabling the bypass mode early should also allow us to switch UVD clocks on the fly. Signed-off-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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