diff options
author | Rocky Hao <rocky.hao@rock-chips.com> | 2016-07-27 16:10:43 +0200 |
---|---|---|
committer | Zhang Rui <rui.zhang@intel.com> | 2016-09-27 08:02:16 +0200 |
commit | 5ef62de751dcd21b3853368ab47eedcbc1cf3475 (patch) | |
tree | 58e3c5cf56fd84573fb1b0d531ca19ecdecf9e73 /drivers/thermal/rockchip_thermal.c | |
parent | thermal: rockchip: enhance the tsadc's bandgap feature for rk3399 (diff) | |
download | linux-5ef62de751dcd21b3853368ab47eedcbc1cf3475.tar.xz linux-5ef62de751dcd21b3853368ab47eedcbc1cf3475.zip |
thermal: rockchip: optimize sensor auto accessing period
In less than 10 ms, the temperature of soc will arise 10 degree. 250 ms
is too big for soc tempeture control. Setting 2.5 ms will speed up
temperature accessing speed but introduce no more cpu's computing overhead.
We set AUTO_PERIOD_TIME and TSADCV3_AUTO_PERIOD_HT_TIME the same value,
because normal temperature update speed is also our consern in IPA.
Signed-off-by: Rocky Hao <rocky.hao@rock-chips.com>
Signed-off-by: Caesar Wang <wxt@rock-chips.com>
Cc: Zhang Rui <rui.zhang@intel.com>
Cc: Eduardo Valentin <edubezval@gmail.com>
Cc: Heiko Stuebner <heiko@sntech.de>
Cc: linux-pm@vger.kernel.org
Tested-by: Stephen Barber <smbarber@chromium.org>
Signed-off-by: Zhang Rui <rui.zhang@intel.com>
Diffstat (limited to 'drivers/thermal/rockchip_thermal.c')
-rw-r--r-- | drivers/thermal/rockchip_thermal.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/drivers/thermal/rockchip_thermal.c b/drivers/thermal/rockchip_thermal.c index a90423d16f39..1f165c990c85 100644 --- a/drivers/thermal/rockchip_thermal.c +++ b/drivers/thermal/rockchip_thermal.c @@ -213,8 +213,8 @@ struct rockchip_thermal_data { #define TSADCV2_HIGHT_TSHUT_DEBOUNCE_COUNT 4 #define TSADCV2_AUTO_PERIOD_TIME 250 /* 250ms */ #define TSADCV2_AUTO_PERIOD_HT_TIME 50 /* 50ms */ -#define TSADCV3_AUTO_PERIOD_TIME 187500 /* 250ms */ -#define TSADCV3_AUTO_PERIOD_HT_TIME 37500 /* 50ms */ +#define TSADCV3_AUTO_PERIOD_TIME 1875 /* 2.5ms */ +#define TSADCV3_AUTO_PERIOD_HT_TIME 1875 /* 2.5ms */ #define TSADCV2_USER_INTER_PD_SOC 0x340 /* 13 clocks */ |