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authorMika Westerberg <mika.westerberg@linux.intel.com>2019-01-09 16:25:43 +0100
committerMika Westerberg <mika.westerberg@linux.intel.com>2019-04-18 10:18:52 +0200
commit5480dfc275aa7e5f892505ce082d71635d6a22f8 (patch)
treeae6ab45771a68ce73fbae4d4c7a2f7a0abbc5cac /drivers/thunderbolt/tb_regs.h
parentthunderbolt: Configure lanes when switch is initialized (diff)
downloadlinux-5480dfc275aa7e5f892505ce082d71635d6a22f8.tar.xz
linux-5480dfc275aa7e5f892505ce082d71635d6a22f8.zip
thunderbolt: Set sleep bit when suspending switch
Thunderbolt 2 devices and beyond link controller needs to be notified when a switch is going to be suspended by setting bit 31 in LC_SX_CTRL register. Add this functionality to the software connection manager. Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Diffstat (limited to 'drivers/thunderbolt/tb_regs.h')
-rw-r--r--drivers/thunderbolt/tb_regs.h2
1 files changed, 2 insertions, 0 deletions
diff --git a/drivers/thunderbolt/tb_regs.h b/drivers/thunderbolt/tb_regs.h
index e0f867dad5cf..1ab6e0fb31c0 100644
--- a/drivers/thunderbolt/tb_regs.h
+++ b/drivers/thunderbolt/tb_regs.h
@@ -239,6 +239,7 @@ struct tb_regs_hop {
/* Common link controller registers */
#define TB_LC_DESC 0x02
+#define TB_LC_DESC_NLC_MASK GENMASK(3, 0)
#define TB_LC_DESC_SIZE_SHIFT 8
#define TB_LC_DESC_SIZE_MASK GENMASK(15, 8)
#define TB_LC_DESC_PORT_SIZE_SHIFT 16
@@ -250,5 +251,6 @@ struct tb_regs_hop {
#define TB_LC_SX_CTRL_L1C BIT(16)
#define TB_LC_SX_CTRL_L2C BIT(20)
#define TB_LC_SX_CTRL_UPSTREAM BIT(30)
+#define TB_LC_SX_CTRL_SLP BIT(31)
#endif