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| author | Mario Limonciello <mario.limonciello@amd.com> | 2022-03-03 14:13:28 +0100 |
|---|---|---|
| committer | Mika Westerberg <mika.westerberg@linux.intel.com> | 2022-03-04 15:10:36 +0100 |
| commit | 144c4a77a3e1e520daba85eafd28999af22e1aa5 (patch) | |
| tree | b844562ade776a41847bec435f150a93ed7884cc /drivers/thunderbolt/tb_regs.h | |
| parent | thunderbolt: Clarify register definitions for `tb_cap_plug_events` (diff) | |
| download | linux-144c4a77a3e1e520daba85eafd28999af22e1aa5.tar.xz linux-144c4a77a3e1e520daba85eafd28999af22e1aa5.zip | |
thunderbolt: Rename EEPROM handling bits to match USB4 spec
The structure `tb_eeprom_ctl` is used to show the bits accessed when
reading/writing EEPROM.
As this structure is specified in the USB4 spec as `VSC_CS_4` update
the names and use of members to match the specification. This should not
change anything functionally.
Signed-off-by: Mario Limonciello <mario.limonciello@amd.com>
Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Diffstat (limited to 'drivers/thunderbolt/tb_regs.h')
| -rw-r--r-- | drivers/thunderbolt/tb_regs.h | 10 |
1 files changed, 5 insertions, 5 deletions
diff --git a/drivers/thunderbolt/tb_regs.h b/drivers/thunderbolt/tb_regs.h index db3005cba203..b301eeb0c89b 100644 --- a/drivers/thunderbolt/tb_regs.h +++ b/drivers/thunderbolt/tb_regs.h @@ -133,11 +133,11 @@ struct tb_cap_phy { } __packed; struct tb_eeprom_ctl { - bool clock:1; /* send pulse to transfer one bit */ - bool access_low:1; /* set to 0 before access */ - bool data_out:1; /* to eeprom */ - bool data_in:1; /* from eeprom */ - bool access_high:1; /* set to 1 before access */ + bool fl_sk:1; /* send pulse to transfer one bit */ + bool fl_cs:1; /* set to 0 before access */ + bool fl_di:1; /* to eeprom */ + bool fl_do:1; /* from eeprom */ + bool bit_banging_enable:1; /* set to 1 before access */ bool not_present:1; /* should be 0 */ bool unknown1:1; bool present:1; /* should be 1 */ |