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authorRajmohan Mani <rajmohan.mani@intel.com>2020-08-17 17:55:20 +0200
committerMika Westerberg <mika.westerberg@linux.intel.com>2020-09-03 11:06:40 +0200
commitdc4c4bf122ed58f7fc1870c483e2e1dbe6912b2f (patch)
treeb0283cb8406364c03b8aba5c92b7be3513c933a6 /drivers/thunderbolt
parentthunderbolt: Use kobj_to_dev() instead of container_of() (diff)
downloadlinux-dc4c4bf122ed58f7fc1870c483e2e1dbe6912b2f.tar.xz
linux-dc4c4bf122ed58f7fc1870c483e2e1dbe6912b2f.zip
thunderbolt: Optimize Force Power logic
Currently the "Force Power" logic uses 10 retries, each with a delay of 250 ms. Thunderbolt controllers in Ice Lake and Tiger Lake platforms are found to complete this in the order of 3 ms or so. Since this delay is in resume path, surplus delay is effectively affecting runtime PM resume flows. Decrease the granularity of the delay to 3 ms and increase the number of retries so we wait maximum of ~1 s which is the recommended timeout. This should make runtime resume a bit faster. Reported-by: Dana Alkattan <dana.alkattan@intel.com> Signed-off-by: Rajmohan Mani <rajmohan.mani@intel.com> Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Diffstat (limited to 'drivers/thunderbolt')
-rw-r--r--drivers/thunderbolt/nhi_ops.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/drivers/thunderbolt/nhi_ops.c b/drivers/thunderbolt/nhi_ops.c
index 6795851aac95..c0d5ccbb10f5 100644
--- a/drivers/thunderbolt/nhi_ops.c
+++ b/drivers/thunderbolt/nhi_ops.c
@@ -59,7 +59,7 @@ static int icl_nhi_force_power(struct tb_nhi *nhi, bool power)
pci_write_config_dword(nhi->pdev, VS_CAP_22, vs_cap);
if (power) {
- unsigned int retries = 10;
+ unsigned int retries = 350;
u32 val;
/* Wait until the firmware tells it is up and running */
@@ -67,7 +67,7 @@ static int icl_nhi_force_power(struct tb_nhi *nhi, bool power)
pci_read_config_dword(nhi->pdev, VS_CAP_9, &val);
if (val & VS_CAP_9_FW_READY)
return 0;
- msleep(250);
+ usleep_range(3000, 3100);
} while (--retries);
return -ETIMEDOUT;