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| author | Sherry Sun <sherry.sun@nxp.com> | 2023-01-30 07:44:47 +0100 |
|---|---|---|
| committer | Greg Kroah-Hartman <gregkh@linuxfoundation.org> | 2023-01-31 10:53:39 +0100 |
| commit | 96f54fd4894711b0dce6a1c8c26c882295dc9234 (patch) | |
| tree | d4529116977d3f84bad6aa2053d8d6354577e45a /drivers/tty/serial/fsl_lpuart.c | |
| parent | tty: serial: fsl_lpuart: Fix the wrong RXWATER setting for rx dma case (diff) | |
| download | linux-96f54fd4894711b0dce6a1c8c26c882295dc9234.tar.xz linux-96f54fd4894711b0dce6a1c8c26c882295dc9234.zip | |
tty: serial: fsl_lpuart: Enable Receiver Idle Empty function for LPUART
With the growth of rx watermark, it's useful to enable the Receiver Idle
Empty function, it can assert the RDRF(Receive Data Register Full Flag)
when the receiver is idle for a number of idle characters and the FIFO
is not empty. It will generate a DMA request or interrupt, which can
avoid receive data being trapped in the RX FIFO since the number of
words received is less than the watermark.
Here set the RXIDEN as 0x3 which enable the RDRF assertion due to
partially filled FIFO when receiver is idle for 4 characters.
Signed-off-by: Sherry Sun <sherry.sun@nxp.com>
Link: https://lore.kernel.org/r/20230130064449.9564-5-sherry.sun@nxp.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Diffstat (limited to 'drivers/tty/serial/fsl_lpuart.c')
| -rw-r--r-- | drivers/tty/serial/fsl_lpuart.c | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/drivers/tty/serial/fsl_lpuart.c b/drivers/tty/serial/fsl_lpuart.c index ba6ade784ac5..2789749d3d0d 100644 --- a/drivers/tty/serial/fsl_lpuart.c +++ b/drivers/tty/serial/fsl_lpuart.c @@ -214,6 +214,7 @@ #define UARTFIFO_RXUF 0x00010000 #define UARTFIFO_TXFLUSH 0x00008000 #define UARTFIFO_RXFLUSH 0x00004000 +#define UARTFIFO_RXIDEN GENMASK(12, 10) #define UARTFIFO_TXOFE 0x00000200 #define UARTFIFO_RXUFE 0x00000100 #define UARTFIFO_TXFE 0x00000080 @@ -1562,6 +1563,7 @@ static void lpuart32_setup_watermark(struct lpuart_port *sport) val = lpuart32_read(&sport->port, UARTFIFO); val |= UARTFIFO_TXFE | UARTFIFO_RXFE; val |= UARTFIFO_TXFLUSH | UARTFIFO_RXFLUSH; + val |= FIELD_PREP(UARTFIFO_RXIDEN, 0x3); lpuart32_write(&sport->port, val, UARTFIFO); /* set the watermark */ |