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| author | Hugo Villeneuve <hvilleneuve@dimonoff.com> | 2023-09-05 17:13:00 +0200 |
|---|---|---|
| committer | Greg Kroah-Hartman <gregkh@linuxfoundation.org> | 2023-09-18 11:14:43 +0200 |
| commit | 064f3bb3bc3e3e4ef8a4de664e3ff5c012646143 (patch) | |
| tree | 99121af2456570154b97ec49afca06e2ac4a3b13 /drivers/tty/serial/sc16is7xx.c | |
| parent | docs: ABI: sysfs-tty: close times are in centiseconds (diff) | |
| download | linux-064f3bb3bc3e3e4ef8a4de664e3ff5c012646143.tar.xz linux-064f3bb3bc3e3e4ef8a4de664e3ff5c012646143.zip | |
serial: sc16is7xx: improve comments about variants
Replace 740/750/760 with generic terms like 74x/75x/76x to account for
variants like 741, 752 and 762.
Signed-off-by: Hugo Villeneuve <hvilleneuve@dimonoff.com>
Reviewed-by: Lech Perczak <lech.perczak@camlingroup.com>
Link: https://lore.kernel.org/r/20230905151300.15365-1-hugo@hugovil.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Diffstat (limited to 'drivers/tty/serial/sc16is7xx.c')
| -rw-r--r-- | drivers/tty/serial/sc16is7xx.c | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/drivers/tty/serial/sc16is7xx.c b/drivers/tty/serial/sc16is7xx.c index d8534580c6d5..8f363ab650f6 100644 --- a/drivers/tty/serial/sc16is7xx.c +++ b/drivers/tty/serial/sc16is7xx.c @@ -223,7 +223,7 @@ * trigger levels. Trigger levels from 4 characters to 60 characters are * available with a granularity of four. * - * When the trigger level setting in TLR is zero, the SC16IS740/750/760 uses the + * When the trigger level setting in TLR is zero, the SC16IS74x/75x/76x uses the * trigger level setting defined in FCR. If TLR has non-zero trigger level value * the trigger level defined in FCR is discarded. This applies to both transmit * FIFO and receive FIFO trigger level setting. @@ -234,7 +234,7 @@ #define SC16IS7XX_TLR_TX_TRIGGER(words) ((((words) / 4) & 0x0f) << 0) #define SC16IS7XX_TLR_RX_TRIGGER(words) ((((words) / 4) & 0x0f) << 4) -/* IOControl register bits (Only 750/760) */ +/* IOControl register bits (Only 75x/76x) */ #define SC16IS7XX_IOCONTROL_LATCH_BIT (1 << 0) /* Enable input latching */ #define SC16IS7XX_IOCONTROL_MODEM_A_BIT (1 << 1) /* Enable GPIO[7:4] as modem A pins */ #define SC16IS7XX_IOCONTROL_MODEM_B_BIT (1 << 2) /* Enable GPIO[3:0] as modem B pins */ @@ -249,9 +249,9 @@ #define SC16IS7XX_EFCR_RTS_INVERT_BIT (1 << 5) /* RTS output inversion */ #define SC16IS7XX_EFCR_IRDA_MODE_BIT (1 << 7) /* IrDA mode * 0 = rate upto 115.2 kbit/s - * - Only 750/760 + * - Only 75x/76x * 1 = rate upto 1.152 Mbit/s - * - Only 760 + * - Only 76x */ /* EFR register bits */ |