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authorShimoda, Yoshihiro <yoshihiro.shimoda.uh@renesas.com>2012-04-06 02:59:14 +0200
committerPaul Mundt <lethal@linux-sh.org>2012-04-09 10:39:34 +0200
commitbbb4ce50f3169b08764f9965fd5b9655646d545a (patch)
tree78d1a6638af4dd952d78eb6e5cc5c7026bec0146 /drivers/tty
parentLinux 3.4-rc2 (diff)
downloadlinux-bbb4ce50f3169b08764f9965fd5b9655646d545a.tar.xz
linux-bbb4ce50f3169b08764f9965fd5b9655646d545a.zip
serial: sh-sci: modify sci_break_ctl()
SCIF modules which have SCSPTR can output the break signal. Now that we have a way of determining port features/capabilities, add trivial break control via SCSPTR support. Tested on sh7757lcr. Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Reviewed-by: Simon Horman <horms@verge.net.au> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Diffstat (limited to 'drivers/tty')
-rw-r--r--drivers/tty/serial/sh-sci.c30
1 files changed, 26 insertions, 4 deletions
diff --git a/drivers/tty/serial/sh-sci.c b/drivers/tty/serial/sh-sci.c
index 3158e17b665c..3e471fc12991 100644
--- a/drivers/tty/serial/sh-sci.c
+++ b/drivers/tty/serial/sh-sci.c
@@ -1564,10 +1564,32 @@ static void sci_enable_ms(struct uart_port *port)
static void sci_break_ctl(struct uart_port *port, int break_state)
{
- /*
- * Not supported by hardware. Most parts couple break and rx
- * interrupts together, with break detection always enabled.
- */
+ struct sci_port *s = to_sci_port(port);
+ unsigned short scscr, scsptr;
+
+ switch (s->cfg->regtype) {
+ case SCIx_SH4_SCIF_REGTYPE:
+ scsptr = serial_port_in(port, SCSPTR);
+ scscr = serial_port_in(port, SCSCR);
+
+ if (break_state == -1) {
+ scsptr = (scsptr | SCSPTR_SPB2IO) & ~SCSPTR_SPB2DT;
+ scscr &= ~SCSCR_TE;
+ } else {
+ scsptr = (scsptr | SCSPTR_SPB2DT) & ~SCSPTR_SPB2IO;
+ scscr |= SCSCR_TE;
+ }
+
+ serial_port_out(port, SCSPTR, scsptr);
+ serial_port_out(port, SCSCR, scscr);
+ break;
+ default:
+ /*
+ * Not supported by hardware. Most parts couple break and rx
+ * interrupts together, with break detection always enabled.
+ */
+ break;
+ }
}
#ifdef CONFIG_SERIAL_SH_SCI_DMA