diff options
| author | Gevorg Sahakyan <Gevorg.Sahakyan@synopsys.com> | 2018-07-26 16:00:13 +0200 |
|---|---|---|
| committer | Felipe Balbi <felipe.balbi@linux.intel.com> | 2018-07-30 09:39:16 +0200 |
| commit | f25c42b8d604fbca6d8d3eff2365a73bbef076d3 (patch) | |
| tree | 7400ccbb88912e79db006043fb0103b7f1359bb3 /drivers/usb/dwc2/params.c | |
| parent | usb: dwc3: pci: Intel Merrifield can be host (diff) | |
| download | linux-f25c42b8d604fbca6d8d3eff2365a73bbef076d3.tar.xz linux-f25c42b8d604fbca6d8d3eff2365a73bbef076d3.zip | |
usb: dwc2: Modify dwc2_readl/writel functions prototype
Added hsotg argument to dwc2_readl/writel function prototype,
and also instead of address pass offset of register.
hsotg will contain flag field for endianness.
Also customized dwc2_set_bit and dwc2_clear_bit function for
dwc2_readl/writel functions.
Signed-off-by: Gevorg Sahakyan <sahakyan@synopsys.com>
Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
Diffstat (limited to 'drivers/usb/dwc2/params.c')
| -rw-r--r-- | drivers/usb/dwc2/params.c | 20 |
1 files changed, 10 insertions, 10 deletions
diff --git a/drivers/usb/dwc2/params.c b/drivers/usb/dwc2/params.c index af075d4da895..f66d0dd5db1c 100644 --- a/drivers/usb/dwc2/params.c +++ b/drivers/usb/dwc2/params.c @@ -654,8 +654,8 @@ static void dwc2_get_host_hwparams(struct dwc2_hsotg *hsotg) dwc2_force_mode(hsotg, true); - gnptxfsiz = dwc2_readl(hsotg->regs + GNPTXFSIZ); - hptxfsiz = dwc2_readl(hsotg->regs + HPTXFSIZ); + gnptxfsiz = dwc2_readl(hsotg, GNPTXFSIZ); + hptxfsiz = dwc2_readl(hsotg, HPTXFSIZ); hw->host_nperio_tx_fifo_size = (gnptxfsiz & FIFOSIZE_DEPTH_MASK) >> FIFOSIZE_DEPTH_SHIFT; @@ -679,13 +679,13 @@ static void dwc2_get_dev_hwparams(struct dwc2_hsotg *hsotg) dwc2_force_mode(hsotg, false); - gnptxfsiz = dwc2_readl(hsotg->regs + GNPTXFSIZ); + gnptxfsiz = dwc2_readl(hsotg, GNPTXFSIZ); fifo_count = dwc2_hsotg_tx_fifo_count(hsotg); for (fifo = 1; fifo <= fifo_count; fifo++) { hw->g_tx_fifo_size[fifo] = - (dwc2_readl(hsotg->regs + DPTXFSIZN(fifo)) & + (dwc2_readl(hsotg, DPTXFSIZN(fifo)) & FIFOSIZE_DEPTH_MASK) >> FIFOSIZE_DEPTH_SHIFT; } @@ -713,7 +713,7 @@ int dwc2_get_hwparams(struct dwc2_hsotg *hsotg) * 0x45f4xxxx, 0x5531xxxx or 0x5532xxxx */ - hw->snpsid = dwc2_readl(hsotg->regs + GSNPSID); + hw->snpsid = dwc2_readl(hsotg, GSNPSID); if ((hw->snpsid & GSNPSID_ID_MASK) != DWC2_OTG_ID && (hw->snpsid & GSNPSID_ID_MASK) != DWC2_FS_IOT_ID && (hw->snpsid & GSNPSID_ID_MASK) != DWC2_HS_IOT_ID) { @@ -726,11 +726,11 @@ int dwc2_get_hwparams(struct dwc2_hsotg *hsotg) hw->snpsid >> 12 & 0xf, hw->snpsid >> 8 & 0xf, hw->snpsid >> 4 & 0xf, hw->snpsid & 0xf, hw->snpsid); - hwcfg1 = dwc2_readl(hsotg->regs + GHWCFG1); - hwcfg2 = dwc2_readl(hsotg->regs + GHWCFG2); - hwcfg3 = dwc2_readl(hsotg->regs + GHWCFG3); - hwcfg4 = dwc2_readl(hsotg->regs + GHWCFG4); - grxfsiz = dwc2_readl(hsotg->regs + GRXFSIZ); + hwcfg1 = dwc2_readl(hsotg, GHWCFG1); + hwcfg2 = dwc2_readl(hsotg, GHWCFG2); + hwcfg3 = dwc2_readl(hsotg, GHWCFG3); + hwcfg4 = dwc2_readl(hsotg, GHWCFG4); + grxfsiz = dwc2_readl(hsotg, GRXFSIZ); /* hwcfg1 */ hw->dev_ep_dirs = hwcfg1; |