diff options
| author | Dinh Nguyen <dinguyen@kernel.org> | 2022-01-25 17:18:20 +0100 |
|---|---|---|
| committer | Greg Kroah-Hartman <gregkh@linuxfoundation.org> | 2022-02-11 11:15:22 +0100 |
| commit | 3d8d3504d23351bcbab7be08f82c5dfabc3c9e0a (patch) | |
| tree | cfbe55ec68d95019f5a02608002ba9026831740c /drivers/usb/dwc2/params.c | |
| parent | dt-bindings: usb: dwc2: add compatible "intel,socfpga-agilex-hsotg" (diff) | |
| download | linux-3d8d3504d23351bcbab7be08f82c5dfabc3c9e0a.tar.xz linux-3d8d3504d23351bcbab7be08f82c5dfabc3c9e0a.zip | |
usb: dwc2: Add platform specific data for Intel's Agilex
The DWC2 IP on the Agilex platform does not support clock-gating.
Acked-by: Minas Harutyunyan <Minas.Harutyunyan@synopsys.com>
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
Link: https://lore.kernel.org/r/20220125161821.1951906-2-dinguyen@kernel.org
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Diffstat (limited to 'drivers/usb/dwc2/params.c')
| -rw-r--r-- | drivers/usb/dwc2/params.c | 10 |
1 files changed, 10 insertions, 0 deletions
diff --git a/drivers/usb/dwc2/params.c b/drivers/usb/dwc2/params.c index d300ae3d9274..1306f4ec788d 100644 --- a/drivers/usb/dwc2/params.c +++ b/drivers/usb/dwc2/params.c @@ -82,6 +82,14 @@ static void dwc2_set_s3c6400_params(struct dwc2_hsotg *hsotg) p->phy_utmi_width = 8; } +static void dwc2_set_socfpga_agilex_params(struct dwc2_hsotg *hsotg) +{ + struct dwc2_core_params *p = &hsotg->params; + + p->power_down = DWC2_POWER_DOWN_PARAM_NONE; + p->no_clock_gating = true; +} + static void dwc2_set_rk_params(struct dwc2_hsotg *hsotg) { struct dwc2_core_params *p = &hsotg->params; @@ -239,6 +247,8 @@ const struct of_device_id dwc2_of_match_table[] = { .data = dwc2_set_stm32mp15_fsotg_params }, { .compatible = "st,stm32mp15-hsotg", .data = dwc2_set_stm32mp15_hsotg_params }, + { .compatible = "intel,socfpga-agilex-hsotg", + .data = dwc2_set_socfpga_agilex_params }, {}, }; MODULE_DEVICE_TABLE(of, dwc2_of_match_table); |