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authorPaul Zimmerman <Paul.Zimmerman@synopsys.com>2011-09-30 09:58:43 +0200
committerGreg Kroah-Hartman <gregkh@suse.de>2011-10-04 19:25:53 +0200
commit82828ca77b8b63b817d9bb540145a4cafa9be582 (patch)
treeb30010f498ea66c2ef29f90d6b39ace733cd187d /drivers/usb/dwc3
parentusb: dwc3: gadget: fix DEPSTARTCFG for non-EP0 EPs (diff)
downloadlinux-82828ca77b8b63b817d9bb540145a4cafa9be582.tar.xz
linux-82828ca77b8b63b817d9bb540145a4cafa9be582.zip
usb: dwc3: gadget: driver should not wait for RxFIFO to drain
An older version of the databook said to wait for the FIFO to drain, but that has been removed from the newer databooks. Waiting for RxFIFO to drain caused problems when testing against one of the host controllers available in the market. After talking to one of the RTL engineers, he stated that we should _not_ wait for RxFIFO to drain. Signed-off-by: Paul Zimmerman <paulz@synopsys.com> Signed-off-by: Felipe Balbi <balbi@ti.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
Diffstat (limited to 'drivers/usb/dwc3')
-rw-r--r--drivers/usb/dwc3/gadget.c19
1 files changed, 0 insertions, 19 deletions
diff --git a/drivers/usb/dwc3/gadget.c b/drivers/usb/dwc3/gadget.c
index 9c0174a8f46c..fd5d2bd9b7ef 100644
--- a/drivers/usb/dwc3/gadget.c
+++ b/drivers/usb/dwc3/gadget.c
@@ -1656,25 +1656,6 @@ static void dwc3_gadget_reset_interrupt(struct dwc3 *dwc)
reg = dwc3_readl(dwc->regs, DWC3_DCFG);
reg &= ~(DWC3_DCFG_DEVADDR_MASK);
dwc3_writel(dwc->regs, DWC3_DCFG, reg);
-
- /*
- * Wait for RxFifo to drain
- *
- * REVISIT probably shouldn't wait forever.
- * In case Hardware ends up in a screwed up
- * case, we error out, notify the user and,
- * maybe, WARN() or BUG() but leave the rest
- * of the kernel working fine.
- *
- * REVISIT the below is rather CPU intensive,
- * maybe we should read and if it doesn't work
- * sleep (not busy wait) for a few useconds.
- *
- * REVISIT why wait until the RXFIFO is empty anyway?
- */
- while (!(dwc3_readl(dwc->regs, DWC3_DSTS)
- & DWC3_DSTS_RXFIFOEMPTY))
- cpu_relax();
}
static void dwc3_update_ram_clk_sel(struct dwc3 *dwc, u32 speed)