Merge tag 'omap-for-v3.13/quirk-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/dt

From Tony Lindgren:
Changes needed to prepare for making omap3 device tree only:

- Always build in board-generic, and add pdata quirks and auxdata
  support for it so we have all the pdata related quirks
  in the same place.

- Merge of the drivers/pinctrl changes that are needed for PM
  to continue working on omap3 and also needed for other omaps
  eventually. The three pinctrl related patches have been acked
  by Linus Walleij and are pulled into both the pinctrl tree
  and this branch.

- Few defconfig related changes for drivers needed.

* tag 'omap-for-v3.13/quirk-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap: (523 commits)
  ARM: configs: omap2plus_defconfig: enable dwc3 and dependencies
  ARM: OMAP2+: Add WLAN modules and of_serial to omap2plus_defconfig
  ARM: OMAP2+: Run make savedefconfig on omap2plus_defconfig to shrink it
  ARM: OMAP2+: Add minimal 8250 support for GPMC
  ARM: OMAP2+: Use pdata quirks for wl12xx for omap3 evm and zoom3
  ARM: OMAP: Move DT wake-up event handling over to use pinctrl-single-omap
  ARM: OMAP2+: Add support for auxdata
  pinctrl: single: Add support for auxdata
  pinctrl: single: Add support for wake-up interrupts
  pinctrl: single: Prepare for supporting SoC specific features
  ARM: OMAP2+: igep0020: use display init from dss-common
  ARM: OMAP2+: pdata-quirks: add legacy display init for IGEPv2 board
  +Linux 3.12-rc4

Signed-off-by: Kevin Hilman <khilman@linaro.org>

1 files changed, 6 insertions, 11 deletions

diff --git a/drivers/usb/host/ehci-fsl.c b/drivers/usb/host/ehci-fsl.c
index 4449f565d6c6..f2407b2e8a99 100644
--- a/drivers/usb/host/ehci-fsl.c
+++ b/drivers/usb/host/ehci-fsl.c
@@ -130,7 +130,7 @@ static int usb_hcd_fsl_probe(const struct hc_driver *driver,
 	}
 
 	/* Enable USB controller, 83xx or 8536 */
-	if (pdata->have_sysif_regs)
+	if (pdata->have_sysif_regs && pdata->controller_ver < FSL_USB_VER_1_6)
 		setbits32(hcd->regs + FSL_SOC_USB_CTRL, 0x4);
 
 	/* Don't need to set host mode here. It will be done by tdi_reset() */
@@ -232,15 +232,9 @@ static int ehci_fsl_setup_phy(struct usb_hcd *hcd,
 	case FSL_USB2_PHY_ULPI:
 		if (pdata->have_sysif_regs && pdata->controller_ver) {
 			/* controller version 1.6 or above */
+			clrbits32(non_ehci + FSL_SOC_USB_CTRL, UTMI_PHY_EN);
 			setbits32(non_ehci + FSL_SOC_USB_CTRL,
-					ULPI_PHY_CLK_SEL);
-			/*
-			 * Due to controller issue of PHY_CLK_VALID in ULPI
-			 * mode, we set USB_CTRL_USB_EN before checking
-			 * PHY_CLK_VALID, otherwise PHY_CLK_VALID doesn't work.
-			 */
-			clrsetbits_be32(non_ehci + FSL_SOC_USB_CTRL,
-					UTMI_PHY_EN, USB_CTRL_USB_EN);
+				ULPI_PHY_CLK_SEL | USB_CTRL_USB_EN);
 		}
 		portsc |= PORT_PTS_ULPI;
 		break;
@@ -270,8 +264,9 @@ static int ehci_fsl_setup_phy(struct usb_hcd *hcd,
 	if (pdata->have_sysif_regs && pdata->controller_ver &&
 	    (phy_mode == FSL_USB2_PHY_ULPI)) {
 		/* check PHY_CLK_VALID to get phy clk valid */
-		if (!spin_event_timeout(in_be32(non_ehci + FSL_SOC_USB_CTRL) &
-				PHY_CLK_VALID, FSL_USB_PHY_CLK_TIMEOUT, 0)) {
+		if (!(spin_event_timeout(in_be32(non_ehci + FSL_SOC_USB_CTRL) &
+				PHY_CLK_VALID, FSL_USB_PHY_CLK_TIMEOUT, 0) ||
+				in_be32(non_ehci + FSL_SOC_USB_PRICTRL))) {
 			printk(KERN_WARNING "fsl-ehci: USB PHY clock invalid\n");
 			return -EINVAL;
 		}