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authorJan Andersson <jan@gaisler.com>2011-05-03 20:11:57 +0200
committerGreg Kroah-Hartman <gregkh@suse.de>2011-05-03 20:43:21 +0200
commitc430131a02d677aa708f56342c1565edfdacb3c0 (patch)
tree15e9930a2512e4b05b7cfd4684f36dd26b0b990f /drivers/usb/host/ehci-octeon.c
parentUSB: OTG: msm: Clear in_lpm flag before enabling the IRQ in resume (diff)
downloadlinux-c430131a02d677aa708f56342c1565edfdacb3c0.tar.xz
linux-c430131a02d677aa708f56342c1565edfdacb3c0.zip
USB: EHCI: Support controllers with big endian capability regs
The two first HC capability registers (CAPLENGTH and HCIVERSION) are defined as one 8-bit and one 16-bit register. Most HC implementations have selected to treat these registers as part of a 32-bit register, giving the same layout for both big and small endian systems. This patch adds a new quirk, big_endian_capbase, to support controllers with big endian register interfaces that treat HCIVERSION and CAPLENGTH as individual registers. Signed-off-by: Jan Andersson <jan@gaisler.com> Acked-by: Alan Stern <stern@rowland.harvard.edu> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
Diffstat (limited to 'drivers/usb/host/ehci-octeon.c')
-rw-r--r--drivers/usb/host/ehci-octeon.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/usb/host/ehci-octeon.c b/drivers/usb/host/ehci-octeon.c
index a31a031178a8..ff55757ba7d8 100644
--- a/drivers/usb/host/ehci-octeon.c
+++ b/drivers/usb/host/ehci-octeon.c
@@ -151,7 +151,7 @@ static int ehci_octeon_drv_probe(struct platform_device *pdev)
ehci->caps = hcd->regs;
ehci->regs = hcd->regs +
- HC_LENGTH(ehci_readl(ehci, &ehci->caps->hc_capbase));
+ HC_LENGTH(ehci, ehci_readl(ehci, &ehci->caps->hc_capbase));
/* cache this readonly data; minimize chip reads */
ehci->hcs_params = ehci_readl(ehci, &ehci->caps->hcs_params);