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authorTuomas Tynkkynen <ttynkkynen@nvidia.com>2013-08-12 15:06:49 +0200
committerFelipe Balbi <balbi@ti.com>2013-08-12 20:29:46 +0200
commit2cdcec4fedd6a5ee77bd551e6be7505f2230cd43 (patch)
treeaad4d77dbfcfd247ee4f6926904895fdec13e35c /drivers/usb/host/ehci.h
parentusb: dwc3: core: clarify usb-phy array binding (diff)
downloadlinux-2cdcec4fedd6a5ee77bd551e6be7505f2230cd43.tar.xz
linux-2cdcec4fedd6a5ee77bd551e6be7505f2230cd43.zip
usb: host: add has_tdi_phy_lpm capability bit
The has_hostpc capability bit indicates that the host controller has the HOSTPC register extensions, but at the same time enables clock disabling power saving features with the PHY Low Power Clock Disable (PHCD) bit. However, some host controllers have the HOSTPC extensions but don't support the low-power feature, so the PHCD bit must not be set on those controllers. Add a separate capability bit for the low-power feature instead, and change all existing users of has_hostpc to use this new capability bit. The idea for this commit is taken from an old 2012 commit that never got merged ("disociate chipidea PHY low power suspend control from hostpc") Inspired-by: Matthieu CASTET <matthieu.castet@parrot.com> Signed-off-by: Tuomas Tynkkynen <ttynkkynen@nvidia.com> Acked-by: Alan Stern <stern@rowland.harvard.edu> Tested-by: Stephen Warren <swarren@nvidia.com> Reviewed-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Felipe Balbi <balbi@ti.com>
Diffstat (limited to 'drivers/usb/host/ehci.h')
-rw-r--r--drivers/usb/host/ehci.h1
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/usb/host/ehci.h b/drivers/usb/host/ehci.h
index 64f9a08e959c..d034d94a7fea 100644
--- a/drivers/usb/host/ehci.h
+++ b/drivers/usb/host/ehci.h
@@ -210,6 +210,7 @@ struct ehci_hcd { /* one per controller */
#define OHCI_HCCTRL_LEN 0x4
__hc32 *ohci_hcctrl_reg;
unsigned has_hostpc:1;
+ unsigned has_tdi_phy_lpm:1;
unsigned has_ppcd:1; /* support per-port change bits */
u8 sbrn; /* packed release number */