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| author | Chunfeng Yun <chunfeng.yun@mediatek.com> | 2017-10-13 10:26:35 +0200 |
|---|---|---|
| committer | Greg Kroah-Hartman <gregkh@linuxfoundation.org> | 2017-10-23 11:29:40 +0200 |
| commit | ce370bfdb9b30830e9ddb88ba8bde2efdd0c9dc0 (patch) | |
| tree | ee440524c46bfc28942afa55bfc634ab3a8e7f65 /drivers/usb/host/xhci-mtk.c | |
| parent | usb: xhci-mtk: use ports count from xhci in xhci_mtk_sch_init() (diff) | |
| download | linux-ce370bfdb9b30830e9ddb88ba8bde2efdd0c9dc0.tar.xz linux-ce370bfdb9b30830e9ddb88ba8bde2efdd0c9dc0.zip | |
usb: xhci-mtk: check clock stability of U3_MAC
This is useful to find out the root cause when the Super Speed doesn't
work. Such as when the T-PHY is switched to PCIe or SATA, and affects
Super Speed function, the check will fail.
Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com>
Acked-by: Mathias Nyman <mathias.nyman@linux.intel.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Diffstat (limited to 'drivers/usb/host/xhci-mtk.c')
| -rw-r--r-- | drivers/usb/host/xhci-mtk.c | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/drivers/usb/host/xhci-mtk.c b/drivers/usb/host/xhci-mtk.c index 9502ca408f01..7a92bb782e5c 100644 --- a/drivers/usb/host/xhci-mtk.c +++ b/drivers/usb/host/xhci-mtk.c @@ -43,6 +43,7 @@ /* ip_pw_sts1 register */ #define STS1_IP_SLEEP_STS BIT(30) +#define STS1_U3_MAC_RST BIT(16) #define STS1_XHCI_RST BIT(11) #define STS1_SYS125_RST BIT(10) #define STS1_REF_RST BIT(8) @@ -125,6 +126,9 @@ static int xhci_mtk_host_enable(struct xhci_hcd_mtk *mtk) check_val = STS1_SYSPLL_STABLE | STS1_REF_RST | STS1_SYS125_RST | STS1_XHCI_RST; + if (mtk->num_u3_ports) + check_val |= STS1_U3_MAC_RST; + ret = readl_poll_timeout(&ippc->ip_pw_sts1, value, (check_val == (value & check_val)), 100, 20000); if (ret) { |