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authorArnd Bergmann <arnd@arndb.de>2012-04-22 22:22:34 +0200
committerArnd Bergmann <arnd@arndb.de>2012-04-22 22:28:48 +0200
commit6540afeae0c66c99c24d43446dab90836170a4e6 (patch)
tree9d4ed5065c9ad95ad8bc4a26a6f5924e83019acd /drivers/usb/host/xhci.c
parentMerge branch 'ixp2xxx/removal' into next/cleanup (diff)
parentARM: at91: add defconfig for device tree (diff)
downloadlinux-6540afeae0c66c99c24d43446dab90836170a4e6.tar.xz
linux-6540afeae0c66c99c24d43446dab90836170a4e6.zip
Merge tag 'at91-3.5-cleanup' of git://github.com/at91linux/linux-at91 into next/cleanup
Nicolas Ferre <nicolas.ferre@atmel.com> writes: First batch of AT91 cleanup for 3.5 kernel. - The biggest improvement of this series is the ability to compile several AT91 SoCs in one kernel image. For now on it's limited to the DT-enabled boards but we can compile all the core together. - The Kconfig series is stacked before other patches as it is simple and non-intrusive. Its goal is to remove too restrictive dependencies on SoC names. This will allow to add support for newer SoC seamlessly. - Some very "cosmetic" Kconfig changes are also added (entry names, comments, etc.). * tag 'at91-3.5-cleanup' of git://github.com/at91linux/linux-at91: (19 commits) ARM: at91: add defconfig for device tree ARM: at91/dt: do not specify the board any more ARN: at91: introduce SOC_AT91xxx define to allow to compile SoC core support ARM: at91: add SOC_AT91SAM9 kconfig option to factorise select ARM: at91: pm select memory controler at runtime ARM: at91: move at91_init_leds to board init ARM: at91: do not pin mux the UARTs in init_early ARM: at91: drop at91_set_serial_console ARM: at91: uncompress: autodetect the uart to use ARM: at91: uncompress Store UART address in a variable hwrng: Kconfig: remove dependency for atmel-rng driver Input: Kconfig: remove dependency for atmel_tsadcc driver rtc: Kconfig: remove dependency for AT91 rtc driver ARM: at91/Kconfig: website link for AT91SAM9G20-EK ARM: at91/Kconfig: add AT91SAM9x5 family to AT91_EARLY_DBGU0 entry ARM: at91/Kconfig: add clarifications to AT91SAM9M10G45-EK entry ARM: at91/Kconfig: add comment to at91sam9x5 family entry ARM: at91/Kconfig: change at91sam9g45 entry ARM: at91: change AT91 Kconfig entry comment Also updates the cleanup branch to v3.4-rc3. Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Diffstat (limited to 'drivers/usb/host/xhci.c')
-rw-r--r--drivers/usb/host/xhci.c12
1 files changed, 8 insertions, 4 deletions
diff --git a/drivers/usb/host/xhci.c b/drivers/usb/host/xhci.c
index e1963d4a430f..36641a7f2371 100644
--- a/drivers/usb/host/xhci.c
+++ b/drivers/usb/host/xhci.c
@@ -106,6 +106,9 @@ int xhci_halt(struct xhci_hcd *xhci)
STS_HALT, STS_HALT, XHCI_MAX_HALT_USEC);
if (!ret)
xhci->xhc_state |= XHCI_STATE_HALTED;
+ else
+ xhci_warn(xhci, "Host not halted after %u microseconds.\n",
+ XHCI_MAX_HALT_USEC);
return ret;
}
@@ -664,11 +667,11 @@ static void xhci_save_registers(struct xhci_hcd *xhci)
xhci->s3.dev_nt = xhci_readl(xhci, &xhci->op_regs->dev_notification);
xhci->s3.dcbaa_ptr = xhci_read_64(xhci, &xhci->op_regs->dcbaa_ptr);
xhci->s3.config_reg = xhci_readl(xhci, &xhci->op_regs->config_reg);
- xhci->s3.irq_pending = xhci_readl(xhci, &xhci->ir_set->irq_pending);
- xhci->s3.irq_control = xhci_readl(xhci, &xhci->ir_set->irq_control);
xhci->s3.erst_size = xhci_readl(xhci, &xhci->ir_set->erst_size);
xhci->s3.erst_base = xhci_read_64(xhci, &xhci->ir_set->erst_base);
xhci->s3.erst_dequeue = xhci_read_64(xhci, &xhci->ir_set->erst_dequeue);
+ xhci->s3.irq_pending = xhci_readl(xhci, &xhci->ir_set->irq_pending);
+ xhci->s3.irq_control = xhci_readl(xhci, &xhci->ir_set->irq_control);
}
static void xhci_restore_registers(struct xhci_hcd *xhci)
@@ -677,10 +680,11 @@ static void xhci_restore_registers(struct xhci_hcd *xhci)
xhci_writel(xhci, xhci->s3.dev_nt, &xhci->op_regs->dev_notification);
xhci_write_64(xhci, xhci->s3.dcbaa_ptr, &xhci->op_regs->dcbaa_ptr);
xhci_writel(xhci, xhci->s3.config_reg, &xhci->op_regs->config_reg);
- xhci_writel(xhci, xhci->s3.irq_pending, &xhci->ir_set->irq_pending);
- xhci_writel(xhci, xhci->s3.irq_control, &xhci->ir_set->irq_control);
xhci_writel(xhci, xhci->s3.erst_size, &xhci->ir_set->erst_size);
xhci_write_64(xhci, xhci->s3.erst_base, &xhci->ir_set->erst_base);
+ xhci_write_64(xhci, xhci->s3.erst_dequeue, &xhci->ir_set->erst_dequeue);
+ xhci_writel(xhci, xhci->s3.irq_pending, &xhci->ir_set->irq_pending);
+ xhci_writel(xhci, xhci->s3.irq_control, &xhci->ir_set->irq_control);
}
static void xhci_set_cmd_ring_deq(struct xhci_hcd *xhci)