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authorZhuang Jin Can <jin.can.zhuang@intel.com>2015-07-21 16:20:30 +0200
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>2015-07-22 23:19:37 +0200
commitfac4271d1126c45ceaceb7f4a336317b771eb121 (patch)
tree7ea059fe9f19fe19b0e262aaf316eb147cee14a5 /drivers/usb/host/xhci.h
parentxhci: report U3 when link is in resume state (diff)
downloadlinux-fac4271d1126c45ceaceb7f4a336317b771eb121.tar.xz
linux-fac4271d1126c45ceaceb7f4a336317b771eb121.zip
xhci: prevent bus_suspend if SS port resuming in phase 1
When the link is just waken, it's in Resume state, and driver sets PLS to U0. This refers to Phase 1. Phase 2 refers to when the link has completed the transition from Resume state to U0. With the fix of xhci: report U3 when link is in resume state, it also exposes an issue that usb3 roothub and controller can suspend right after phase 1, and this causes a hard hang in controller. To fix the issue, we need to prevent usb3 bus suspend if any port is resuming in phase 1. [merge separate USB2 and USB3 port resume checking to one -Mathias] Cc: <stable@vger.kernel.org> Signed-off-by: Zhuang Jin Can <jin.can.zhuang@intel.com> Signed-off-by: Mathias Nyman <mathias.nyman@linux.intel.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Diffstat (limited to 'drivers/usb/host/xhci.h')
-rw-r--r--drivers/usb/host/xhci.h1
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/usb/host/xhci.h b/drivers/usb/host/xhci.h
index 31e46cc55807..ed2ebf647c38 100644
--- a/drivers/usb/host/xhci.h
+++ b/drivers/usb/host/xhci.h
@@ -285,6 +285,7 @@ struct xhci_op_regs {
#define XDEV_U0 (0x0 << 5)
#define XDEV_U2 (0x2 << 5)
#define XDEV_U3 (0x3 << 5)
+#define XDEV_INACTIVE (0x6 << 5)
#define XDEV_RESUME (0xf << 5)
/* true: port has power (see HCC_PPC) */
#define PORT_POWER (1 << 9)