diff options
| author | Minas Harutyunyan <Minas.Harutyunyan@synopsys.com> | 2019-04-18 13:40:43 +0200 |
|---|---|---|
| committer | Felipe Balbi <felipe.balbi@linux.intel.com> | 2019-05-03 08:13:47 +0200 |
| commit | 466375657d6c5987f2f2404c75b7081ede14cff4 (patch) | |
| tree | 41a3bb07b2d13e4dccd1c80dc3e76414cdeae4b7 /drivers/usb | |
| parent | USB: Export usb_wakeup_enabled_descendants() (diff) | |
| download | linux-466375657d6c5987f2f2404c75b7081ede14cff4.tar.xz linux-466375657d6c5987f2f2404c75b7081ede14cff4.zip | |
usb: dwc2: gadget: Reject LPM token during Control transfers
Avoiding switch to L1 state in any stage of control transfers.
Send NYET handshake to LPM token.
Renamed GLPMCFG_LPM_ACCEPT_CTRL_ISOC to GLPMCFG_LPM_REJECT_CTRL_CONTROL
because by setting this bit core reject LPM token.
Signed-off-by: Minas Harutyunyan <hminas@synopsys.com>
Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
Diffstat (limited to 'drivers/usb')
| -rw-r--r-- | drivers/usb/dwc2/gadget.c | 1 | ||||
| -rw-r--r-- | drivers/usb/dwc2/hw.h | 2 |
2 files changed, 2 insertions, 1 deletions
diff --git a/drivers/usb/dwc2/gadget.c b/drivers/usb/dwc2/gadget.c index 6812a8a3a98b..6ac850d6ad44 100644 --- a/drivers/usb/dwc2/gadget.c +++ b/drivers/usb/dwc2/gadget.c @@ -5073,6 +5073,7 @@ void dwc2_gadget_init_lpm(struct dwc2_hsotg *hsotg) val |= hsotg->params.lpm_clock_gating ? GLPMCFG_ENBLSLPM : 0; val |= hsotg->params.hird_threshold << GLPMCFG_HIRD_THRES_SHIFT; val |= hsotg->params.besl ? GLPMCFG_ENBESL : 0; + val |= GLPMCFG_LPM_REJECT_CTRL_CONTROL; val |= GLPMCFG_LPM_ACCEPT_CTRL_ISOC; dwc2_writel(hsotg, val, GLPMCFG); dev_dbg(hsotg->dev, "GLPMCFG=0x%08x\n", dwc2_readl(hsotg, GLPMCFG)); diff --git a/drivers/usb/dwc2/hw.h b/drivers/usb/dwc2/hw.h index 98af924a9a5c..1bc394dcfa9d 100644 --- a/drivers/usb/dwc2/hw.h +++ b/drivers/usb/dwc2/hw.h @@ -333,7 +333,7 @@ #define GLPMCFG_SNDLPM BIT(24) #define GLPMCFG_RETRY_CNT_MASK (0x7 << 21) #define GLPMCFG_RETRY_CNT_SHIFT 21 -#define GLPMCFG_LPM_ACCEPT_CTRL_CONTROL BIT(21) +#define GLPMCFG_LPM_REJECT_CTRL_CONTROL BIT(21) #define GLPMCFG_LPM_ACCEPT_CTRL_ISOC BIT(22) #define GLPMCFG_LPM_CHNL_INDX_MASK (0xf << 17) #define GLPMCFG_LPM_CHNL_INDX_SHIFT 17 |