diff options
| author | Chris Ruehl <chris.ruehl@gtsys.com.hk> | 2014-01-10 06:51:29 +0100 |
|---|---|---|
| committer | Greg Kroah-Hartman <gregkh@linuxfoundation.org> | 2014-01-14 00:55:19 +0100 |
| commit | 3b5d3e6845bfe68777d069886b0d1cd5f23b9d58 (patch) | |
| tree | fb5c1665e5bf14c31e497c7eed80faf1f223aca5 /drivers/usb | |
| parent | usb: chipidea: imx: set CI_HDRC_IMX28_WRITE_FIX for imx28 (diff) | |
| download | linux-3b5d3e6845bfe68777d069886b0d1cd5f23b9d58.tar.xz linux-3b5d3e6845bfe68777d069886b0d1cd5f23b9d58.zip | |
usb: chipidea: Fix Internal error: : 808 [#1] ARM related to STS flag
* init the sts flag to 0 (missed)
* fix write the real bit not sts value
* Set PORTCS_STS and DEVLC_STS only if sts = 1
[Peter Chen: This one and the next patch fix the problem occurred imx27
and imx31, and imx27 and imx31 usb support are enabled until 3.14, so
these two patches isn't needed for -stable]
Signed-off-by: Chris Ruehl <chris.ruehl@gtsys.com.hk>
Signed-off-by: Peter Chen <peter.chen@freescale.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Diffstat (limited to 'drivers/usb')
| -rw-r--r-- | drivers/usb/chipidea/core.c | 8 |
1 files changed, 5 insertions, 3 deletions
diff --git a/drivers/usb/chipidea/core.c b/drivers/usb/chipidea/core.c index 0ead0b4a11e1..edeec3638684 100644 --- a/drivers/usb/chipidea/core.c +++ b/drivers/usb/chipidea/core.c @@ -236,7 +236,7 @@ static int hw_device_init(struct ci_hdrc *ci, void __iomem *base) static void hw_phymode_configure(struct ci_hdrc *ci) { - u32 portsc, lpm, sts; + u32 portsc, lpm, sts = 0; switch (ci->platdata->phy_mode) { case USBPHY_INTERFACE_MODE_UTMI: @@ -266,10 +266,12 @@ static void hw_phymode_configure(struct ci_hdrc *ci) if (ci->hw_bank.lpm) { hw_write(ci, OP_DEVLC, DEVLC_PTS(7) | DEVLC_PTW, lpm); - hw_write(ci, OP_DEVLC, DEVLC_STS, sts); + if (sts) + hw_write(ci, OP_DEVLC, DEVLC_STS, DEVLC_STS); } else { hw_write(ci, OP_PORTSC, PORTSC_PTS(7) | PORTSC_PTW, portsc); - hw_write(ci, OP_PORTSC, PORTSC_STS, sts); + if (sts) + hw_write(ci, OP_PORTSC, PORTSC_STS, PORTSC_STS); } } |