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authorTimur Tabi <timur@freescale.com>2011-06-23 22:20:26 +0200
committerPaul Mundt <lethal@linux-sh.org>2011-06-24 10:08:49 +0200
commit39785eb1d3e6c58cc8bf8f6990956a58037ecc75 (patch)
treeb896a48b483803124c940ff99e7ffdfd4a4a171c /drivers/video/bfin-lq035q1-fb.c
parentudlfb: Correct sub-optimal resolution selection. (diff)
downloadlinux-39785eb1d3e6c58cc8bf8f6990956a58037ecc75.tar.xz
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fsl-diu-fb: remove check for pixel clock ranges
The Freescale DIU framebuffer driver defines two constants, MIN_PIX_CLK and MAX_PIX_CLK, that are supposed to represent the lower and upper limits of the pixel clock. These values, however, are true only for one platform clock rate (533MHz) and only for the MPC8610. So the actual range for the pixel clock is chip-specific, which means the current values are almost always wrong. The chance of an out-of-range pixel clock being used are also remote. Rather than try to detect an out-of-range clock in the DIU driver, we depend on the board-specific pixel clock function (e.g. p1022ds_set_pixel_clock) to clamp the pixel clock to a supported value. Signed-off-by: Timur Tabi <timur@freescale.com> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Diffstat (limited to 'drivers/video/bfin-lq035q1-fb.c')
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