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authorRicardo Neri <ricardo.neri@ti.com>2012-01-31 22:56:16 +0100
committerTomi Valkeinen <tomi.valkeinen@ti.com>2012-02-21 08:40:22 +0100
commitf15511e23db4e1deb6bf6a3c88c04ba85434e142 (patch)
tree95a9785a6a6f5f528de86ea439f43ff6f6f43e2f /drivers/video/imsttfb.c
parentOMAPDSS: HDMI: Implement initialization of MCLK (diff)
downloadlinux-f15511e23db4e1deb6bf6a3c88c04ba85434e142.tar.xz
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OMAPDSS: HDMI: Modify logic to configure MCLK
The MCLK mode defines a factor to divide the clock that is used to generate the Audio Clock Regeneration packets, MCLK. The divisor is not used when the CTS value is calculated by HW. When the value is calculated by SW, it depends on the silicon revision. Signed-off-by: Ricardo Neri <ricardo.neri@ti.com> Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
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