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authorTomi Valkeinen <tomi.valkeinen@ti.com>2013-10-31 15:41:57 +0100
committerTomi Valkeinen <tomi.valkeinen@ti.com>2013-11-18 13:32:28 +0100
commit688af02d22c11a077532d6437e4afc7bdc972f82 (patch)
treed241479783178b85d67abb350ba053a99355115a /drivers/video/omap2/dss/sdi.c
parentOMAPDSS: cleanup fck parent handling (diff)
downloadlinux-688af02d22c11a077532d6437e4afc7bdc972f82.tar.xz
linux-688af02d22c11a077532d6437e4afc7bdc972f82.zip
OMAPDSS: pass pck to dss fck clock calc
We need the required pixel clock rate when calculating the dss fclk on SoCs that have a dedicated DSS PLL. This patch changes the code to pass the pck to the calc functions. The pck rate is taken into use in the next patch. Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Diffstat (limited to 'drivers/video/omap2/dss/sdi.c')
-rw-r--r--drivers/video/omap2/dss/sdi.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/video/omap2/dss/sdi.c b/drivers/video/omap2/dss/sdi.c
index 221fd34c42ff..3bf47c92aedf 100644
--- a/drivers/video/omap2/dss/sdi.c
+++ b/drivers/video/omap2/dss/sdi.c
@@ -97,7 +97,7 @@ static int sdi_calc_clock_div(unsigned long pclk,
ctx.pck_min = 0;
ctx.pck_max = pclk + 1000 * i * i * i;
- ok = dss_div_calc(ctx.pck_min, dpi_calc_dss_cb, &ctx);
+ ok = dss_div_calc(pclk, ctx.pck_min, dpi_calc_dss_cb, &ctx);
if (ok) {
*fck = ctx.fck;
*dispc_cinfo = ctx.dispc_cinfo;