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authorMaciej W. Rozycki <macro@linux-mips.org>2007-02-12 09:54:57 +0100
committerLinus Torvalds <torvalds@woody.linux-foundation.org>2007-02-12 18:48:41 +0100
commita524d946bdced73c5fbe60170fb33611491c4211 (patch)
tree1699a10cd7700bdff5005e19c1945c268a418039 /drivers/video/tgafb.c
parent[PATCH] tgafb: module support fixes (diff)
downloadlinux-a524d946bdced73c5fbe60170fb33611491c4211.tar.xz
linux-a524d946bdced73c5fbe60170fb33611491c4211.zip
[PATCH] tgafb: sync-on-green support fixes
This sets up the deep register of the TGA ASIC as well as the blank pedestal of the Bt463 RAMDAC correctly for the sync-on-green mode. Signed-off-by: Maciej W. Rozycki <macro@linux-mips.org> Cc: James Simmons <jsimmons@infradead.org> Cc: "Antonino A. Daplas" <adaplas@pol.net> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Diffstat (limited to 'drivers/video/tgafb.c')
-rw-r--r--drivers/video/tgafb.c8
1 files changed, 5 insertions, 3 deletions
diff --git a/drivers/video/tgafb.c b/drivers/video/tgafb.c
index 2a6bfcdc3039..781ca7f77c09 100644
--- a/drivers/video/tgafb.c
+++ b/drivers/video/tgafb.c
@@ -197,7 +197,9 @@ tgafb_set_par(struct fb_info *info)
while (TGA_READ_REG(par, TGA_CMD_STAT_REG) & 1) /* wait for not busy */
continue;
mb();
- TGA_WRITE_REG(par, deep_presets[tga_type], TGA_DEEP_REG);
+ TGA_WRITE_REG(par, deep_presets[tga_type] |
+ (par->sync_on_green ? 0x0 : 0x00010000),
+ TGA_DEEP_REG);
while (TGA_READ_REG(par, TGA_CMD_STAT_REG) & 1) /* wait for not busy */
continue;
mb();
@@ -261,11 +263,11 @@ tgafb_set_par(struct fb_info *info)
} else { /* 24-plane or 24plusZ */
- /* Init BT463 registers. */
+ /* Init BT463 RAMDAC registers. */
BT463_WRITE(par, BT463_REG_ACC, BT463_CMD_REG_0, 0x40);
BT463_WRITE(par, BT463_REG_ACC, BT463_CMD_REG_1, 0x08);
BT463_WRITE(par, BT463_REG_ACC, BT463_CMD_REG_2,
- (par->sync_on_green ? 0x80 : 0x40));
+ (par->sync_on_green ? 0xc0 : 0x40));
BT463_WRITE(par, BT463_REG_ACC, BT463_READ_MASK_0, 0xff);
BT463_WRITE(par, BT463_REG_ACC, BT463_READ_MASK_1, 0xff);