diff options
| author | Florian Tobias Schandinat <FlorianSchandinat@gmx.de> | 2009-09-23 01:47:22 +0200 |
|---|---|---|
| committer | Linus Torvalds <torvalds@linux-foundation.org> | 2009-09-23 16:39:52 +0200 |
| commit | 8594ac33450e6d66460230e5d07f5515b51476c9 (patch) | |
| tree | f04d1a075cfe37b23a2be29d7f9f0861fcfc2e55 /drivers/video/via/viamode.c | |
| parent | viafb: remove unused video device stuff (diff) | |
| download | linux-8594ac33450e6d66460230e5d07f5515b51476c9.tar.xz linux-8594ac33450e6d66460230e5d07f5515b51476c9.zip | |
viafb: remove LVDS initialization
At least for VX800 this initialization is not very good as some parts of
the register are written with reserved values. This makes the display go
white in some configurations and not usable until the framebuffer is
removed. It's better to not initialize it as it allows to use a
previously (by BIOS) correctly configured display.
This patch makes some displays work but might cause problems on others.
This is bad but can not be easily avoided. If this causes some
regressions it's probably the best to fix it in the 'active' display setup
code.
Signed-off-by: Florian Tobias Schandinat <FlorianSchandinat@gmx.de>
Cc: Scott Fang <ScottFang@viatech.com.cn>
Cc: Joseph Chan <JosephChan@via.com.tw>
Cc: Harald Welte <laforge@gnumonks.org>
Cc: Jonathan Corbet <corbet@lwn.net>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Diffstat (limited to 'drivers/video/via/viamode.c')
| -rw-r--r-- | drivers/video/via/viamode.c | 3 |
1 files changed, 1 insertions, 2 deletions
diff --git a/drivers/video/via/viamode.c b/drivers/video/via/viamode.c index 9ff9424ea6c3..16a8a97f6042 100644 --- a/drivers/video/via/viamode.c +++ b/drivers/video/via/viamode.c @@ -309,8 +309,7 @@ struct io_reg CX700_ModeXregs[] = { {VIASR, SR10, 0xFF, 0x01}, {VIACR, CR96, 0xFF, 0x00}, {VIACR, CR97, 0xFF, 0x00}, {VIACR, CR99, 0xFF, 0x00}, -{VIACR, CR9B, 0xFF, 0x00}, -{VIACR, CRD2, 0xFF, 0xFF} /* TMDS/LVDS control register. */ +{VIACR, CR9B, 0xFF, 0x00} }; /* Video Mode Table */ |