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authorTomi Valkeinen <tomi.valkeinen@ti.com>2013-10-31 15:42:13 +0100
committerTomi Valkeinen <tomi.valkeinen@ti.com>2013-11-18 13:32:28 +0100
commitfc1fe6e794cc85fcdb63daa9c7a977940ff49e4f (patch)
treedc061a3f7b568417296297e21f149ba1a00b8254 /drivers/video
parentOMAPDSS: pass pck to dss fck clock calc (diff)
downloadlinux-fc1fe6e794cc85fcdb63daa9c7a977940ff49e4f.tar.xz
linux-fc1fe6e794cc85fcdb63daa9c7a977940ff49e4f.zip
OMAPDSS: add dedicated fck PLL support
This patch adds support for SoCs that have a dedicated DSS PLL used for DSS function clock. If there is no dss parent clock defined, it is presumed that the functionl clock rate can be set (almost) freely. The code calculates the highest allowed fck rate, which when divided with some integer gives the required pck. Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Diffstat (limited to 'drivers/video')
-rw-r--r--drivers/video/omap2/dss/dss.c27
1 files changed, 18 insertions, 9 deletions
diff --git a/drivers/video/omap2/dss/dss.c b/drivers/video/omap2/dss/dss.c
index 08c58ebe219c..9a145da35ad3 100644
--- a/drivers/video/omap2/dss/dss.c
+++ b/drivers/video/omap2/dss/dss.c
@@ -446,12 +446,20 @@ bool dss_div_calc(unsigned long pck, unsigned long fck_min,
unsigned long prate;
unsigned m;
+ fck_hw_max = dss_feat_get_param_max(FEAT_PARAM_DSS_FCK);
+
if (dss.parent_clk == NULL) {
- fck = clk_get_rate(dss.dss_clk);
+ unsigned pckd;
+
+ pckd = fck_hw_max / pck;
+
+ fck = pck * pckd;
+
+ fck = clk_round_rate(dss.dss_clk, fck);
+
return func(fck, data);
}
- fck_hw_max = dss_feat_get_param_max(FEAT_PARAM_DSS_FCK);
fckd_hw_max = dss.feat->fck_div_max;
m = dss.feat->dss_fck_multiplier;
@@ -503,16 +511,17 @@ static int dss_setup_default_clock(void)
unsigned fck_div;
int r;
- if (dss.parent_clk == NULL)
- return 0;
-
max_dss_fck = dss_feat_get_param_max(FEAT_PARAM_DSS_FCK);
- prate = clk_get_rate(dss.parent_clk);
+ if (dss.parent_clk == NULL) {
+ fck = clk_round_rate(dss.dss_clk, max_dss_fck);
+ } else {
+ prate = clk_get_rate(dss.parent_clk);
- fck_div = DIV_ROUND_UP(prate * dss.feat->dss_fck_multiplier,
- max_dss_fck);
- fck = prate / fck_div * dss.feat->dss_fck_multiplier;
+ fck_div = DIV_ROUND_UP(prate * dss.feat->dss_fck_multiplier,
+ max_dss_fck);
+ fck = prate / fck_div * dss.feat->dss_fck_multiplier;
+ }
r = dss_set_fck_rate(fck);
if (r)