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| author | Takeshi Kihara <takeshi.kihara.df@renesas.com> | 2017-07-12 18:55:39 +0200 |
|---|---|---|
| committer | Geert Uytterhoeven <geert+renesas@glider.be> | 2017-07-17 11:01:41 +0200 |
| commit | 5d26ee5172dc6b0ddceac835a6a1d838cfd7f135 (patch) | |
| tree | 42f5eac50a303a9b3052aac30800cfe9fe1bd9b1 /drivers/vlynq | |
| parent | pinctrl: sh-pfc: r8a7796: Fix SCIF_CLK_{A,B} pin's MOD_SEL assignment to MOD_... (diff) | |
| download | linux-5d26ee5172dc6b0ddceac835a6a1d838cfd7f135.tar.xz linux-5d26ee5172dc6b0ddceac835a6a1d838cfd7f135.zip | |
pinctrl: sh-pfc: r8a7796: Fix FMCLK{_C,_D} and FMIN{_C,_D} pin function definitions
This patch fixes the implementation incorrect of IPSR register value
definitions for FMCLK{_C,_D} and FMIN{_C,_D} pins function.
This is a correction to the incorrect implementation of IPSR register
pin assignment for R8A7796 SoC specification of R-Car Gen3 Hardware
User's Manual Rev.0.51E or later.
Fixes: f9aece7344bd81ce ("pinctrl: sh-pfc: Initial R8A7796 PFC support")
Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
Signed-off-by: Yoshihiro Kaneko <ykaneko0929@gmail.com>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Diffstat (limited to 'drivers/vlynq')
0 files changed, 0 insertions, 0 deletions