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authorAnton Vorontsov <avorontsov@ru.mvista.com>2008-07-04 08:51:36 +0200
committerWim Van Sebroeck <wim@iguana.be>2008-08-06 15:08:47 +0200
commit0d7b101404f7bedcf3f448c1667c3744551cd9ee (patch)
treeb38363e88e0b02c4bdbc265c05b3fb770fe0b143 /drivers/watchdog/acquirewdt.c
parent[WATCHDOG] mpc8xxx_wdt: fix build (diff)
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[WATCHDOG] mpc8xxx_wdt: add support for MPC8xx watchdogs
The mpc8xxx_wdt driver is using two registers: SWSRR to push magic numbers, and SWCRR to control the watchdog. Both registers are available on the MPC8xx, and seem to have the same offsets and semantics as in MPC83xx/MPC86xx watchdogs. The only difference is prescale value. So this driver simply works on the MPC8xx CPUs. One quirk is needed for the MPC8xx, though. It has small prescale value and slow CPU, so the watchdog resets board prior to the driver has time to load. To solve this we should split initialization in two steps: start ping the watchdog early, and register the watchdog userspace interface later. MPC823 seem to be the first CPU in MPC8xx line, so we use fsl,mpc823-wdt compatible matching. Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com> Tested-by: Jochen Friedrich <jochen@scram.de> Cc: Kumar Gala <galak@kernel.crashing.org> Signed-off-by: Wim Van Sebroeck <wim@iguana.be> Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Diffstat (limited to 'drivers/watchdog/acquirewdt.c')
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