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authorLucas Stach <l.stach@pengutronix.de>2017-09-18 17:45:07 +0200
committerPhilipp Zabel <p.zabel@pengutronix.de>2017-10-11 12:04:24 +0200
commit11aff4b4c7c4b7257660ef890920f2ac72911ed0 (patch)
treede7d0e83075cdbae34bcf76a727a5321a9692bef /drivers/watchdog/mtk_wdt.c
parentgpu: ipu-v3: prg: wait for double buffers to be filled on channel startup (diff)
downloadlinux-11aff4b4c7c4b7257660ef890920f2ac72911ed0.tar.xz
linux-11aff4b4c7c4b7257660ef890920f2ac72911ed0.zip
gpu: ipu-v3: pre: implement workaround for ERR009624
The PRE has a bug where a software write to the CTRL register can block the setting of the ENABLE bit by the hardware in auto repeat mode. When this happens the PRE will fail to handle new jobs. To work around this software must not write to CTRL register when the PRE store engine is inside the unsafe window, where a hardware update to the ENABLE bit may happen. Signed-off-by: Lucas Stach <l.stach@pengutronix.de> [p.zabel@pengutronix.de: rebased before PRE tiled prefetch support] Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
Diffstat (limited to 'drivers/watchdog/mtk_wdt.c')
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