diff options
author | Huang Rui <ray.huang@amd.com> | 2015-11-23 11:07:35 +0100 |
---|---|---|
committer | Wim Van Sebroeck <wim@iguana.be> | 2015-12-27 20:42:55 +0100 |
commit | bdecfcdb5461834aab24002bb18d3cbdd907b7fb (patch) | |
tree | a03c76b89c7516b8f2fe0a5bd13f05ada7719e0f /drivers/watchdog | |
parent | sp5100_tco: Add AMD Carrizo platform support (diff) | |
download | linux-bdecfcdb5461834aab24002bb18d3cbdd907b7fb.tar.xz linux-bdecfcdb5461834aab24002bb18d3cbdd907b7fb.zip |
sp5100_tco: fix the device check for SB800 and later chipsets
For SB800 and later chipsets, the register definitions are the same
with SB800. And for SB700 and older chipsets, the definitions should
be same with SP5100/SB7x0.
Signed-off-by: Huang Rui <ray.huang@amd.com>
Cc: Denis Turischev <denis.turischev@compulab.co.il>
Signed-off-by: Guenter Roeck <linux@roeck-us.net>
Signed-off-by: Wim Van Sebroeck <wim@iguana.be>
Diffstat (limited to 'drivers/watchdog')
-rw-r--r-- | drivers/watchdog/sp5100_tco.c | 28 |
1 files changed, 16 insertions, 12 deletions
diff --git a/drivers/watchdog/sp5100_tco.c b/drivers/watchdog/sp5100_tco.c index 0ccadb44b609..6467b91f2245 100644 --- a/drivers/watchdog/sp5100_tco.c +++ b/drivers/watchdog/sp5100_tco.c @@ -335,21 +335,24 @@ static unsigned char sp5100_tco_setupdevice(void) if (!sp5100_tco_pci) return 0; - pr_info("PCI Revision ID: 0x%x\n", sp5100_tco_pci->revision); + pr_info("PCI Vendor ID: 0x%x, Device ID: 0x%x, Revision ID: 0x%x\n", + sp5100_tco_pci->vendor, sp5100_tco_pci->device, + sp5100_tco_pci->revision); /* * Determine type of southbridge chipset. */ - if (sp5100_tco_pci->revision >= 0x40) { - dev_name = SB800_DEVNAME; - index_reg = SB800_IO_PM_INDEX_REG; - data_reg = SB800_IO_PM_DATA_REG; - base_addr = SB800_PM_WATCHDOG_BASE; - } else { + if (sp5100_tco_pci->device == PCI_DEVICE_ID_ATI_SBX00_SMBUS && + sp5100_tco_pci->revision < 0x40) { dev_name = SP5100_DEVNAME; index_reg = SP5100_IO_PM_INDEX_REG; data_reg = SP5100_IO_PM_DATA_REG; base_addr = SP5100_PM_WATCHDOG_BASE; + } else { + dev_name = SB800_DEVNAME; + index_reg = SB800_IO_PM_INDEX_REG; + data_reg = SB800_IO_PM_DATA_REG; + base_addr = SB800_PM_WATCHDOG_BASE; } /* Request the IO ports used by this driver */ @@ -385,7 +388,12 @@ static unsigned char sp5100_tco_setupdevice(void) * Secondly, Find the watchdog timer MMIO address * from SBResource_MMIO register. */ - if (sp5100_tco_pci->revision >= 0x40) { + if (sp5100_tco_pci->device == PCI_DEVICE_ID_ATI_SBX00_SMBUS && + sp5100_tco_pci->revision < 0x40) { + /* Read SBResource_MMIO from PCI config(PCI_Reg: 9Ch) */ + pci_read_config_dword(sp5100_tco_pci, + SP5100_SB_RESOURCE_MMIO_BASE, &val); + } else { /* Read SBResource_MMIO from AcpiMmioEn(PM_Reg: 24h) */ outb(SB800_PM_ACPI_MMIO_EN+3, SB800_IO_PM_INDEX_REG); val = inb(SB800_IO_PM_DATA_REG); @@ -395,10 +403,6 @@ static unsigned char sp5100_tco_setupdevice(void) val = val << 8 | inb(SB800_IO_PM_DATA_REG); outb(SB800_PM_ACPI_MMIO_EN+0, SB800_IO_PM_INDEX_REG); val = val << 8 | inb(SB800_IO_PM_DATA_REG); - } else { - /* Read SBResource_MMIO from PCI config(PCI_Reg: 9Ch) */ - pci_read_config_dword(sp5100_tco_pci, - SP5100_SB_RESOURCE_MMIO_BASE, &val); } /* The SBResource_MMIO is enabled and mapped memory space? */ |