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authorGreg Ungerer <gerg@snapgear.com>2007-03-07 02:28:13 +0100
committerLinus Torvalds <torvalds@woody.linux-foundation.org>2007-03-07 03:08:38 +0100
commitebfcfef44e4a759dd08a4b5e28848787b5530c0c (patch)
treee343b5f3366e4dd9982151f6c5173779f1fd5a86 /drivers
parent[PATCH] m68knommu: use irq_handler_t and remove regs arg for 68328 (diff)
downloadlinux-ebfcfef44e4a759dd08a4b5e28848787b5530c0c.tar.xz
linux-ebfcfef44e4a759dd08a4b5e28848787b5530c0c.zip
[PATCH] m68knommu: set GPIO lines for serial ports on 5282 in mcfserial.c
For the Freescale M5282 ColdFire, Port UA Pin Assignment Register should set to UART mode. Patch submitted by David Wu <davidwu@arcturusnetworks.com>. Signed-off-by: Greg Ungerer <gerg@uclinux.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Diffstat (limited to 'drivers')
-rw-r--r--drivers/serial/mcfserial.c11
1 files changed, 9 insertions, 2 deletions
diff --git a/drivers/serial/mcfserial.c b/drivers/serial/mcfserial.c
index 08430961a895..4e2eb351f74e 100644
--- a/drivers/serial/mcfserial.c
+++ b/drivers/serial/mcfserial.c
@@ -1541,8 +1541,8 @@ static void mcfrs_irqinit(struct mcf_serial *info)
* External Pin Mask Setting & Enable External Pin for Interface
* mrcbis@aliceposta.it
*/
- unsigned short *serpin_enable_mask;
- serpin_enable_mask = (MCF_IPSBAR + MCF_GPIO_PAR_UART);
+ u16 *serpin_enable_mask;
+ serpin_enable_mask = (u16 *) (MCF_IPSBAR + MCF_GPIO_PAR_UART);
if (info->line == 0)
*serpin_enable_mask |= UART0_ENABLE_MASK;
else if (info->line == 1)
@@ -1551,6 +1551,13 @@ static void mcfrs_irqinit(struct mcf_serial *info)
*serpin_enable_mask |= UART2_ENABLE_MASK;
}
#endif
+#if defined(CONFIG_M528x)
+ /* make sure PUAPAR is set for UART0 and UART1 */
+ if (info->line < 2) {
+ volatile unsigned char *portp = (volatile unsigned char *) (MCF_MBAR + MCF5282_GPIO_PUAPAR);
+ *portp |= (0x03 << (info->line * 2));
+ }
+#endif
#elif defined(CONFIG_M520x)
volatile unsigned char *icrp, *uartp;
volatile unsigned long *imrp;