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| author | Mauro Carvalho Chehab <mchehab@redhat.com> | 2013-02-15 11:21:08 +0100 |
|---|---|---|
| committer | Mauro Carvalho Chehab <mchehab@redhat.com> | 2013-02-21 15:06:37 +0100 |
| commit | c66b5a79a9348ccd6d1cd81416027d0e12da965d (patch) | |
| tree | c6a25cbd329ebb6cd7edadb9bcd5f94796d94e97 /drivers | |
| parent | edac: initialize the core earlier (diff) | |
| download | linux-c66b5a79a9348ccd6d1cd81416027d0e12da965d.tar.xz linux-c66b5a79a9348ccd6d1cd81416027d0e12da965d.zip | |
edac: add a new memory layer type
There are some cases where the memory controller layout is
completely hidden. This is the case of firmware-driven error
code, like the one provided by GHES. Add a new layer to be
used on such memory error report mechanisms.
Signed-off-by: Mauro Carvalho Chehab <mchehab@redhat.com>
Diffstat (limited to 'drivers')
| -rw-r--r-- | drivers/edac/edac_mc.c | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/edac/edac_mc.c b/drivers/edac/edac_mc.c index fb219bc5cb2c..78d8c7d6e76a 100644 --- a/drivers/edac/edac_mc.c +++ b/drivers/edac/edac_mc.c @@ -900,6 +900,7 @@ const char *edac_layer_name[] = { [EDAC_MC_LAYER_CHANNEL] = "channel", [EDAC_MC_LAYER_SLOT] = "slot", [EDAC_MC_LAYER_CHIP_SELECT] = "csrow", + [EDAC_MC_LAYER_ALL_MEM] = "memory", }; EXPORT_SYMBOL_GPL(edac_layer_name); |