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authorLogan Gunthorpe <logang@deltatee.com>2016-06-03 22:50:31 +0200
committerJon Mason <jdmason@kudzu.us>2016-08-05 16:21:06 +0200
commit4aae977721f0367809cdc94584b6945073d9fe10 (patch)
tree2ed434a025160326c1bfc04b61269ad867b5cc51 /drivers
parentNTB: allocate number transport entries depending on size of ring size (diff)
downloadlinux-4aae977721f0367809cdc94584b6945073d9fe10.tar.xz
linux-4aae977721f0367809cdc94584b6945073d9fe10.zip
ntb_perf: Allow limiting the size of the memory windows
On my system, dma_alloc_coherent won't produce memory anywhere near the size of the BAR. So I needed a way to limit this. It's pretty much copied straight from ntb_transport. Signed-off-by: Logan Gunthorpe <logang@deltatee.com> Acked-by: Dave Jiang <dave.jiang@intel.com> Signed-off-by: Jon Mason <jdmason@kudzu.us>
Diffstat (limited to 'drivers')
-rw-r--r--drivers/ntb/test/ntb_perf.c8
1 files changed, 8 insertions, 0 deletions
diff --git a/drivers/ntb/test/ntb_perf.c b/drivers/ntb/test/ntb_perf.c
index 8dfce9c9aad0..30635c89320c 100644
--- a/drivers/ntb/test/ntb_perf.c
+++ b/drivers/ntb/test/ntb_perf.c
@@ -83,6 +83,10 @@ MODULE_DESCRIPTION(DRIVER_DESCRIPTION);
static struct dentry *perf_debugfs_dir;
+static unsigned long max_mw_size;
+module_param(max_mw_size, ulong, 0644);
+MODULE_PARM_DESC(max_mw_size, "Limit size of large memory windows");
+
static unsigned int seg_order = 19; /* 512K */
module_param(seg_order, uint, 0644);
MODULE_PARM_DESC(seg_order, "size order [n^2] of buffer segment for testing");
@@ -472,6 +476,10 @@ static void perf_link_work(struct work_struct *work)
dev_dbg(&perf->ntb->pdev->dev, "%s called\n", __func__);
size = perf->mw.phys_size;
+
+ if (max_mw_size && size > max_mw_size)
+ size = max_mw_size;
+
ntb_peer_spad_write(ndev, MW_SZ_HIGH, upper_32_bits(size));
ntb_peer_spad_write(ndev, MW_SZ_LOW, lower_32_bits(size));
ntb_peer_spad_write(ndev, VERSION, PERF_VERSION);